Commit e002474158d1 ("pci: pci-uclass: Dynamically allocate the PCI regions") changes 'struct pci_controller'.regions from pre-allocated array of regions to dynamically allocated, which unfortunately broken lots of boards that still use the non-DM PCI driver.

This patch changes the non-DM fsl_pci_init driver to dynamically allocate the regions, just like what's done in the pci uclass driver.

Fixes: e002474158d1 ("pci: pci-uclass: Dynamically allocate the PCI regions") Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Simon Glass sjg@chromium.org

---

(no changes since v2)

Changes in v2: - drop the revert patch of commit e002474158d1 - new patch: pci: fsl_pci_init: Dynamically allocate the PCI regions

drivers/pci/fsl_pci_init.c | 5 +++++ 1 file changed, 5 insertions(+)

diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c index e72a60c..fc3327e 100644 --- a/drivers/pci/fsl_pci_init.c +++ b/drivers/pci/fsl_pci_init.c @@ -32,6 +32,8 @@ DECLARE_GLOBAL_DATA_PTR; #include <asm/io.h> #include <asm/fsl_pci.h>

+#define MAX_PCI_REGIONS 7 + #ifndef CONFIG_SYS_PCI_MEMORY_BUS #define CONFIG_SYS_PCI_MEMORY_BUS 0 #endif @@ -80,6 +82,9 @@ int fsl_setup_hose(struct pci_controller *hose, unsigned long addr) /* Reset hose to make sure its in a clean state */ memset(hose, 0, sizeof(struct pci_controller));

+ hose->regions = (struct pci_region *) + calloc(1, MAX_PCI_REGIONS * sizeof(struct pci_region)); + pci_setup_indirect(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data);

return fsl_is_pci_agent(hose);

At present fdt_read_prop() can only handle 1 or 2 cells. It is called by fdt_read_range() which may be used to read PCI address from <ranges> for a PCI bus node where the number of PCI address cell is 3. The <ranges> property is an array of:

{ <child address> <parent address> <size in child address space> }

When trying to read <child address> from a PCI bus node using fdt_read_prop(), as the codes below:

/* Read <child address> */ if (child_addr) { r = fdt_read_prop(ranges, ranges_len, cell, child_addr, acells); if (r) return r; }

it will fail, because the PCI child address is made up of 3 cells but fdt_read_prop() cannot handle it. We advance the cell offset by 1 so that the <child address> can be correctly read.

This adds the special handling of such case.

Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Priyanka Jain priyanka.jain@nxp.com

---

(no changes since v2)

Changes in v2: - add more details in the commit message, and put some comments in the codes to explain why

common/fdt_support.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-)

diff --git a/common/fdt_support.c b/common/fdt_support.c index 08d540b..e624bbd 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -1668,22 +1668,36 @@ u64 fdt_get_base_address(const void *fdt, int node) }

/* - * Read a property of size <prop_len>. Currently only supports 1 or 2 cells. + * Read a property of size <prop_len>. Currently only supports 1 or 2 cells, + * or 3 cells specially for a PCI address. */ static int fdt_read_prop(const fdt32_t *prop, int prop_len, int cell_off, uint64_t *val, int cells) { - const fdt32_t *prop32 = &prop[cell_off]; - const unaligned_fdt64_t *prop64 = (const fdt64_t *)&prop[cell_off]; + const fdt32_t *prop32; + const unaligned_fdt64_t *prop64;

if ((cell_off + cells) > prop_len) return -FDT_ERR_NOSPACE;

+ prop32 = &prop[cell_off]; + + /* + * Special handling for PCI address in PCI bus <ranges> + * + * PCI child address is made up of 3 cells. Advance the cell offset + * by 1 so that the PCI child address can be correctly read. + */ + if (cells == 3) + cell_off += 1; + prop64 = (const fdt64_t *)&prop[cell_off]; + switch (cells) { case 1: *val = fdt32_to_cpu(*prop32); break; case 2: + case 3: *val = fdt64_to_cpu(*prop64); break; default:

LAW related codes should be wrapped with CONFIG_FSL_LAW.

Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Priyanka Jain priyanka.jain@nxp.com ---

(no changes since v1)

arch/powerpc/cpu/mpc85xx/cpu.c | 2 ++ arch/powerpc/cpu/mpc85xx/cpu_init_early.c | 2 ++ 2 files changed, 4 insertions(+)

diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c index 5170610..fc25bb2 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu.c +++ b/arch/powerpc/cpu/mpc85xx/cpu.c @@ -395,7 +395,9 @@ int cpu_mmc_init(struct bd_info *bis) void print_reginfo(void) { print_tlbcam(); +#ifdef CONFIG_FSL_LAW print_laws(); +#endif #if defined(CONFIG_FSL_LBC) print_lbc_regs(); #endif diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c index 4195ecc..5a0d33b 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c @@ -123,7 +123,9 @@ void cpu_init_early_f(void *fdt) setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_LCLK_IFC_CS3); #endif

+#ifdef CONFIG_FSL_LAW init_laws(); +#endif

/* * Work Around for IFC Erratum A003399, issue will hit only when execution

These are no longer needed. Drop them.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

(no changes since v1)

board/freescale/qemu-ppce500/qemu-ppce500.c | 10 ---------- 1 file changed, 10 deletions(-)

diff --git a/board/freescale/qemu-ppce500/qemu-ppce500.c b/board/freescale/qemu-ppce500/qemu-ppce500.c index 1d68d30..dba5e0f 100644 --- a/board/freescale/qemu-ppce500/qemu-ppce500.c +++ b/board/freescale/qemu-ppce500/qemu-ppce500.c @@ -254,11 +254,6 @@ int ft_board_setup(void *blob, struct bd_info *bd) } #endif

-void print_laws(void) -{ - /* We don't emulate LAWs yet */ -} - phys_size_t fixed_sdram(void) { return get_linear_ram_size(); @@ -302,11 +297,6 @@ void init_tlbs(void) 1024 * 1024, TLB_MAP_RAM)); }

-void init_laws(void) -{ - /* We don't emulate LAWs yet */ -} - static uint32_t get_cpu_freq(void) { void *fdt = get_fdt_virt();

The QEMU ppce500 machine generates a device tree blob and passes it to U-Boot during boot. Let's enable OF_CONTROL with OF_BOARD and provide board_fdt_blob_setup() in the board codes.

Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Priyanka Jain priyanka.jain@nxp.com ---

(no changes since v1)

board/freescale/qemu-ppce500/qemu-ppce500.c | 10 ++++++++++ configs/qemu-ppce500_defconfig | 3 ++- 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/board/freescale/qemu-ppce500/qemu-ppce500.c b/board/freescale/qemu-ppce500/qemu-ppce500.c index 4719d98..50167d5 100644 --- a/board/freescale/qemu-ppce500/qemu-ppce500.c +++ b/board/freescale/qemu-ppce500/qemu-ppce500.c @@ -364,3 +364,13 @@ u32 cpu_mask(void) { return (1 << cpu_numcores()) - 1; } + +/** + * Return the virtual address of FDT that was passed by QEMU + * + * @return virtual address of FDT received from QEMU in r3 register + */ +void *board_fdt_blob_setup(void) +{ + return get_fdt_virt(); +} diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig index 25fcd41..4522e18 100644 --- a/configs/qemu-ppce500_defconfig +++ b/configs/qemu-ppce500_defconfig @@ -22,6 +22,8 @@ CONFIG_CMD_PING=y # CONFIG_CMD_HASH is not set CONFIG_CMD_EXT2=y CONFIG_DOS_PARTITION=y +CONFIG_OF_CONTROL=y +CONFIG_OF_BOARD=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_MMC is not set @@ -29,4 +31,3 @@ CONFIG_E1000=y CONFIG_SYS_NS16550=y CONFIG_ADDR_MAP=y CONFIG_PANIC_HANG=y -CONFIG_OF_LIBFDT=y

Remove the extern of the header because they are useless.

Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Priyanka Jain priyanka.jain@nxp.com ---

(no changes since v1)

include/addr_map.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/include/addr_map.h b/include/addr_map.h index d322dd2..85e737d 100644 --- a/include/addr_map.h +++ b/include/addr_map.h @@ -8,9 +8,9 @@

#include <asm/types.h>

-extern phys_addr_t addrmap_virt_to_phys(void *vaddr); -extern void *addrmap_phys_to_virt(phys_addr_t paddr); -extern void addrmap_set_entry(unsigned long vaddr, phys_addr_t paddr, - phys_size_t size, int idx); +phys_addr_t addrmap_virt_to_phys(void *vaddr); +void *addrmap_phys_to_virt(phys_addr_t paddr); +void addrmap_set_entry(unsigned long vaddr, phys_addr_t paddr, + phys_size_t size, int idx);

#endif

This adds a new command 'addrmap' to display the address map for non-identity virtual-physical memory mappings.

Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Priyanka Jain priyanka.jain@nxp.com

---

(no changes since v2)

Changes in v2: - add doc/usage/addrmap.rst

cmd/Kconfig | 7 +++++++ cmd/Makefile | 1 + cmd/addrmap.c | 35 +++++++++++++++++++++++++++++++++++ doc/usage/addrmap.rst | 41 +++++++++++++++++++++++++++++++++++++++++ doc/usage/index.rst | 1 + 5 files changed, 85 insertions(+) create mode 100644 cmd/addrmap.c create mode 100644 doc/usage/addrmap.rst

diff --git a/cmd/Kconfig b/cmd/Kconfig index 928a2a0..2021939 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -97,6 +97,13 @@ config CMD_ACPI between the firmware and OS, and is particularly useful when you want to make hardware changes without the OS needing to be adjusted.

+config CMD_ADDRMAP + bool "addrmap" + depends on ADDR_MAP + default y + help + List non-identity virtual-physical memory mappings for 32-bit CPUs. + config CMD_BDI bool "bdinfo" default y diff --git a/cmd/Makefile b/cmd/Makefile index 176bf92..567e2b7 100644 --- a/cmd/Makefile +++ b/cmd/Makefile @@ -13,6 +13,7 @@ obj-y += version.o

# command obj-$(CONFIG_CMD_ACPI) += acpi.o +obj-$(CONFIG_CMD_ADDRMAP) += addrmap.o obj-$(CONFIG_CMD_AES) += aes.o obj-$(CONFIG_CMD_AB_SELECT) += ab_select.o obj-$(CONFIG_CMD_ADC) += adc.o diff --git a/cmd/addrmap.c b/cmd/addrmap.c new file mode 100644 index 0000000..bd23549 --- /dev/null +++ b/cmd/addrmap.c @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2021, Bin Meng bmeng.cn@gmail.com + */ + +#include <common.h> +#include <command.h> +#include <addr_map.h> + +static int do_addrmap(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + int i; + + printf(" vaddr paddr size\n"); + printf("================ ================ ================\n"); + + for (i = 0; i < CONFIG_SYS_NUM_ADDR_MAP; i++) { + if (address_map[i].size == 0) + continue; + + printf("%16.8lx %16.8llx %16.8llx\n", + address_map[i].vaddr, + (unsigned long long)address_map[i].paddr, + (unsigned long long)address_map[i].size); + } + + return 0; +} + +U_BOOT_CMD( + addrmap, 1, 1, do_addrmap, + "List non-identity virtual-physical memory mappings for 32-bit CPUs", + "" +); diff --git a/doc/usage/addrmap.rst b/doc/usage/addrmap.rst new file mode 100644 index 0000000..472fd54 --- /dev/null +++ b/doc/usage/addrmap.rst @@ -0,0 +1,41 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +addrmap command +=============== + +Synopsis +-------- + +:: + + addrmap + +Description +----------- + +The addrmap command is used to display non-identity virtual-physical memory +mappings for 32-bit CPUs. + +The output may look like: + +:: + + => addrmap + vaddr paddr size + ================ ================ ================ + e0000000 fe0000000 00100000 + 00000000 00000000 04000000 + 04000000 04000000 04000000 + 80000000 c00000000 10000000 + 90000000 c10000000 10000000 + a0000000 fe1000000 00010000 + +The first column indicates the virtual address. +The second column indicates the physical address. +The third column indicates the mapped size. + +Configuration +------------- + +To use the addrmap command you must specify CONFIG_CMD_ADDRMAP=y. +It is automatically turned on when CONFIG_ADDR_MAP is set. diff --git a/doc/usage/index.rst b/doc/usage/index.rst index a8842bf..f962246 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -13,6 +13,7 @@ Shell commands .. toctree:: :maxdepth: 1

+ addrmap base bootefi booti

This adds a basic test for the newly introduced 'addrmap' command.

Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Simon Glass sjg@chromium.org

---

(no changes since v2)

Changes in v2: - new patch: test: cmd: Add a basic test for 'addrmap' command

include/test/suites.h | 2 ++ test/cmd/Makefile | 1 + test/cmd/addrmap.c | 38 ++++++++++++++++++++++++++++++++++++++ test/cmd_ut.c | 6 ++++++ 4 files changed, 47 insertions(+) create mode 100644 test/cmd/addrmap.c

diff --git a/include/test/suites.h b/include/test/suites.h index 52e8fc8..f5d8e13 100644 --- a/include/test/suites.h +++ b/include/test/suites.h @@ -26,6 +26,8 @@ int cmd_ut_category(const char *name, const char *prefix, struct unit_test *tests, int n_ents, int argc, char *const argv[]);

+int do_ut_addrmap(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]); int do_ut_bootm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); int do_ut_bloblist(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); diff --git a/test/cmd/Makefile b/test/cmd/Makefile index 5451e9e..8699976 100644 --- a/test/cmd/Makefile +++ b/test/cmd/Makefile @@ -6,6 +6,7 @@ ifdef CONFIG_HUSH_PARSER obj-$(CONFIG_CONSOLE_RECORD) += test_echo.o endif obj-y += mem.o +obj-$(CONFIG_CMD_ADDRMAP) += addrmap.o obj-$(CONFIG_CMD_MEM_SEARCH) += mem_search.o obj-$(CONFIG_CMD_PWM) += pwm.o obj-y += setexpr.o diff --git a/test/cmd/addrmap.c b/test/cmd/addrmap.c new file mode 100644 index 0000000..fb74448 --- /dev/null +++ b/test/cmd/addrmap.c @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Tests for addrmap command + * + * Copyright (C) 2021, Bin Meng bmeng.cn@gmail.com + */ + +#include <common.h> +#include <console.h> +#include <test/suites.h> +#include <test/ut.h> + +/* Declare a new addrmap test */ +#define ADDRMAP_TEST(_name, _flags) UNIT_TEST(_name, _flags, addrmap_test) + +/* Test 'addrmap' command output */ +static int addrmap_test_basic(struct unit_test_state *uts) +{ + ut_assertok(console_record_reset_enable()); + ut_assertok(run_command("addrmap", 0)); + ut_assert_nextline(" vaddr paddr size"); + ut_assert_nextline("================ ================ ================"); + /* There should be at least one entry */ + ut_assertok(!ut_check_console_end(uts)); + + return 0; +} +ADDRMAP_TEST(addrmap_test_basic, UT_TESTF_CONSOLE_REC); + +int do_ut_addrmap(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) +{ + struct unit_test *tests = ll_entry_start(struct unit_test, + addrmap_test); + const int n_ents = ll_entry_count(struct unit_test, addrmap_test); + + return cmd_ut_category("cmd_addrmap", "cmd_addrmap_", tests, n_ents, + argc, argv); +} diff --git a/test/cmd_ut.c b/test/cmd_ut.c index 90674d5..8404309 100644 --- a/test/cmd_ut.c +++ b/test/cmd_ut.c @@ -91,6 +91,9 @@ static struct cmd_tbl cmd_ut_sub[] = { U_BOOT_CMD_MKENT(bootm, CONFIG_SYS_MAXARGS, 1, do_ut_bootm, "", ""), #endif U_BOOT_CMD_MKENT(str, CONFIG_SYS_MAXARGS, 1, do_ut_str, "", ""), +#ifdef CONFIG_CMD_ADDRMAP + U_BOOT_CMD_MKENT(addrmap, CONFIG_SYS_MAXARGS, 1, do_ut_addrmap, "", ""), +#endif };

static int do_ut_all(struct cmd_tbl *cmdtp, int flag, int argc, @@ -166,6 +169,9 @@ static char ut_help_text[] = !defined(CONFIG_SPL_BUILD) && !defined(API_BUILD) "ut unicode [test-name] - test Unicode functions\n" #endif +#ifdef CONFIG_CMD_ADDRMAP + "ut addrmap - Very basic test of addrmap command\n" +#endif ; #endif /* CONFIG_SYS_LONGHELP */

Mention that CONFIG_ADDR_MAP only works in the post-relocation phase.

Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Priyanka Jain priyanka.jain@nxp.com ---

(no changes since v1)

lib/Kconfig | 2 ++ 1 file changed, 2 insertions(+)

diff --git a/lib/Kconfig b/lib/Kconfig index 7f4c30e..7288340 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -6,6 +6,8 @@ config ADDR_MAP Enables helper code for implementing non-identity virtual-physical memory mappings for 32bit CPUs.

+ This library only works in the post-relocation phase. + config SYS_NUM_ADDR_MAP int "Size of the address-map table" depends on ADDR_MAP

At present initr_addr_map() is put at a late stage in the init_sequence_r[] calls. This won't work because lot of device driver initialization (e.g.: serial port) happens before it but is lack of the address translation support.

This moves the call to a bit earlier, right after the DM initialization.

Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Priyanka Jain priyanka.jain@nxp.com ---

(no changes since v1)

common/board_r.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/common/board_r.c b/common/board_r.c index 9793439..c835ff8 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -626,6 +626,9 @@ static init_fnc_t init_sequence_r[] = { #ifdef CONFIG_DM initr_dm, #endif +#ifdef CONFIG_ADDR_MAP + initr_addr_map, +#endif #if defined(CONFIG_ARM) || defined(CONFIG_NDS32) || defined(CONFIG_RISCV) || \ defined(CONFIG_SANDBOX) board_init, /* Setup chipselects */ @@ -661,9 +664,6 @@ static init_fnc_t init_sequence_r[] = { initr_manual_reloc_cmdtable, #endif arch_initr_trap, -#ifdef CONFIG_ADDR_MAP - initr_addr_map, -#endif #if defined(CONFIG_BOARD_EARLY_INIT_R) board_early_init_r, #endif

The QEMU ppce500 target integrates 2 NS16550 serial ports. Switch over to use the DM version of the driver by:

- drop unnecessary ad-hoc config macros - add get_serial_clock() in the board codes

Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Priyanka Jain priyanka.jain@nxp.com ---

(no changes since v1)

board/freescale/qemu-ppce500/qemu-ppce500.c | 6 ++++++ configs/qemu-ppce500_defconfig | 1 + include/configs/qemu-ppce500.h | 10 ---------- 3 files changed, 7 insertions(+), 10 deletions(-)

diff --git a/board/freescale/qemu-ppce500/qemu-ppce500.c b/board/freescale/qemu-ppce500/qemu-ppce500.c index 50167d5..db13582 100644 --- a/board/freescale/qemu-ppce500/qemu-ppce500.c +++ b/board/freescale/qemu-ppce500/qemu-ppce500.c @@ -374,3 +374,9 @@ void *board_fdt_blob_setup(void) { return get_fdt_virt(); } + +/* See CONFIG_SYS_NS16550_CLK in arch/powerpc/include/asm/config.h */ +int get_serial_clock(void) +{ + return get_bus_freq(0); +} diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig index f2a8b83..c528a68 100644 --- a/configs/qemu-ppce500_defconfig +++ b/configs/qemu-ppce500_defconfig @@ -30,6 +30,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y # CONFIG_MMC is not set CONFIG_E1000=y +CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_ADDR_MAP=y CONFIG_PANIC_HANG=y diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index f13e4ea..feac6ef 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -73,16 +73,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)

-#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 -#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)) - -#define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} - -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) - /* * General PCI * Memory space is mapped 1-1, but I/O space must start from 0.

At present the driver only supports 32-bit bus and cpu address. The controller's outbound registers/fields for extended address are not programmed. Let's program them to support 64-bit bus and cpu address.

Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Heiko Schocher hs@denx.de ---

(no changes since v1)

drivers/pci/pci_mpc85xx.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/pci/pci_mpc85xx.c b/drivers/pci/pci_mpc85xx.c index f0d469a..574cb78 100644 --- a/drivers/pci/pci_mpc85xx.c +++ b/drivers/pci/pci_mpc85xx.c @@ -93,18 +93,18 @@ static int mpc85xx_pci_dm_probe(struct udevice *dev)

pcix = priv->cfg_addr; /* BAR 1: memory */ - out_be32(&pcix->potar1, (mem->bus_start >> 12) & 0x000fffff); - out_be32(&pcix->potear1, 0); - out_be32(&pcix->powbar1, (mem->phys_start >> 12) & 0x000fffff); - out_be32(&pcix->powbear1, 0); + out_be32(&pcix->potar1, mem->bus_start >> 12); + out_be32(&pcix->potear1, (u64)mem->bus_start >> 44); + out_be32(&pcix->powbar1, mem->phys_start >> 12); + out_be32(&pcix->powbear1, (u64)mem->phys_start >> 44); out_be32(&pcix->powar1, (POWAR_EN | POWAR_MEM_READ | POWAR_MEM_WRITE | (__ilog2(mem->size) - 1)));

/* BAR 1: IO */ - out_be32(&pcix->potar2, (io->bus_start >> 12) & 0x000fffff); - out_be32(&pcix->potear2, 0); - out_be32(&pcix->powbar2, (io->phys_start >> 12) & 0x000fffff); - out_be32(&pcix->powbear2, 0); + out_be32(&pcix->potar2, io->bus_start >> 12); + out_be32(&pcix->potear2, (u64)io->bus_start >> 44); + out_be32(&pcix->powbar2, io->phys_start >> 12); + out_be32(&pcix->powbear2, (u64)io->phys_start >> 44); out_be32(&pcix->powar2, (POWAR_EN | POWAR_IO_READ | POWAR_IO_WRITE | (__ilog2(io->size) - 1)));

ft_board_setup() is now empty. Drop it.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

(no changes since v1)

board/freescale/qemu-ppce500/qemu-ppce500.c | 7 ------- configs/qemu-ppce500_defconfig | 1 - 2 files changed, 8 deletions(-)

diff --git a/board/freescale/qemu-ppce500/qemu-ppce500.c b/board/freescale/qemu-ppce500/qemu-ppce500.c index 659f794..79a6986 100644 --- a/board/freescale/qemu-ppce500/qemu-ppce500.c +++ b/board/freescale/qemu-ppce500/qemu-ppce500.c @@ -173,13 +173,6 @@ static uint64_t get_linear_ram_size(void) panic("Couldn't determine RAM size"); }

-#if defined(CONFIG_OF_BOARD_SETUP) -int ft_board_setup(void *blob, struct bd_info *bd) -{ - return 0; -} -#endif - phys_size_t fixed_sdram(void) { return get_linear_ram_size(); diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig index 4a4b369..918739b 100644 --- a/configs/qemu-ppce500_defconfig +++ b/configs/qemu-ppce500_defconfig @@ -6,7 +6,6 @@ CONFIG_MPC85xx=y CONFIG_TARGET_QEMU_PPCE500=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y -CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set

By default the QEMU ppce500 machine connects a VirtIO NET to the PCI controller, although it can be replaced to an e1000 NIC via additional command line options.

Now that we have switched over to DM PCI, VirtIO support becomes possible. This commit enables the support.

Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Priyanka Jain priyanka.jain@nxp.com ---

(no changes since v1)

board/freescale/qemu-ppce500/qemu-ppce500.c | 8 ++++++++ configs/qemu-ppce500_defconfig | 2 ++ 2 files changed, 10 insertions(+)

diff --git a/board/freescale/qemu-ppce500/qemu-ppce500.c b/board/freescale/qemu-ppce500/qemu-ppce500.c index 79a6986..9c30c12 100644 --- a/board/freescale/qemu-ppce500/qemu-ppce500.c +++ b/board/freescale/qemu-ppce500/qemu-ppce500.c @@ -24,6 +24,8 @@ #include <fdtdec.h> #include <errno.h> #include <malloc.h> +#include <virtio_types.h> +#include <virtio.h>

DECLARE_GLOBAL_DATA_PTR;

@@ -130,6 +132,12 @@ int misc_init_r(void) if (ret) return ret;

+ /* + * Make sure virtio bus is enumerated so that peripherals + * on the virtio bus can be discovered by their drivers. + */ + virtio_init(); + return 0; }

diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig index 918739b..202e97e 100644 --- a/configs/qemu-ppce500_defconfig +++ b/configs/qemu-ppce500_defconfig @@ -33,5 +33,7 @@ CONFIG_DM_PCI=y CONFIG_PCI_MPC85XX=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y +CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_NET=y CONFIG_ADDR_MAP=y CONFIG_PANIC_HANG=y

Enable VirtIO BLK driver so that we can store a kernel image to a disk image and boot from there.

Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Priyanka Jain priyanka.jain@nxp.com

---

(no changes since v2)

Changes in v2: - new patch: ppc: qemu: Enable VirtIO BLK support

configs/qemu-ppce500_defconfig | 3 +++ 1 file changed, 3 insertions(+)

diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig index 202e97e..b2510c8 100644 --- a/configs/qemu-ppce500_defconfig +++ b/configs/qemu-ppce500_defconfig @@ -26,6 +26,8 @@ CONFIG_OF_BOARD=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y +CONFIG_BLK=y +CONFIG_HAVE_BLOCK_DEVICE=y # CONFIG_MMC is not set CONFIG_DM_ETH=y CONFIG_E1000=y @@ -35,5 +37,6 @@ CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_VIRTIO_PCI=y CONFIG_VIRTIO_NET=y +CONFIG_VIRTIO_BLK=y CONFIG_ADDR_MAP=y CONFIG_PANIC_HANG=y

dev_read_addr_size_index() returns fdt_addr_t which might be a 64-bit physical address. This might be true for some 85xx SoCs whose CCSBAR is mapped beyond 4 GiB.

Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Priyanka Jain priyanka.jain@nxp.com

---

(no changes since v2)

Changes in v2: - new patch: gpio: mpc8xxx: Support controller register physical address beyond 32-bit

arch/powerpc/include/asm/arch-mpc85xx/gpio.h | 2 +- drivers/gpio/mpc8xxx_gpio.c | 7 ++++--- 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/include/asm/arch-mpc85xx/gpio.h b/arch/powerpc/include/asm/arch-mpc85xx/gpio.h index c7086a8..79ba786 100644 --- a/arch/powerpc/include/asm/arch-mpc85xx/gpio.h +++ b/arch/powerpc/include/asm/arch-mpc85xx/gpio.h @@ -18,7 +18,7 @@ #endif

struct mpc8xxx_gpio_plat { - ulong addr; + phys_addr_t addr; unsigned long size; uint ngpios; }; diff --git a/drivers/gpio/mpc8xxx_gpio.c b/drivers/gpio/mpc8xxx_gpio.c index c733603..f7ffd89 100644 --- a/drivers/gpio/mpc8xxx_gpio.c +++ b/drivers/gpio/mpc8xxx_gpio.c @@ -20,7 +20,7 @@ struct mpc8xxx_gpio_data { /* The bank's register base in memory */ struct ccsr_gpio __iomem *base; /* The address of the registers; used to identify the bank */ - ulong addr; + phys_addr_t addr; /* The GPIO count of the bank */ uint gpio_count; /* The GPDAT register cannot be used to determine the value of output @@ -181,7 +181,7 @@ static int mpc8xxx_gpio_of_to_plat(struct udevice *dev) if (dev_read_bool(dev, "little-endian")) data->little_endian = true;

- plat->addr = (ulong)dev_read_addr_size_index(dev, 0, (fdt_size_t *)&plat->size); + plat->addr = dev_read_addr_size_index(dev, 0, (fdt_size_t *)&plat->size); plat->ngpios = dev_read_u32_default(dev, "ngpios", 32);

return 0; @@ -220,7 +220,8 @@ static int mpc8xxx_gpio_probe(struct udevice *dev)

mpc8xxx_gpio_plat_to_priv(dev);

- snprintf(name, sizeof(name), "MPC@%lx_", data->addr); + snprintf(name, sizeof(name), "MPC@%.8llx", + (unsigned long long)data->addr); str = strdup(name);

if (!str)

sysreset uclass driver provides an implementation of 'reset' command using the sysreset_ APIs unconditionally. It also supports the 'poweroff' command using the sysreset_ APIs, but under a Kconfig option CONFIG_SYSRESET_CMD_POWEROFF.

Let's do the same for the 'reset' command, by introducing a new Kconfig option CONFIG_SYSRESET_CMD_RESET, and set it to on by default, to allow a board that don't have a sysreset reset driver yet, but have a sysreset poweroff driver to compile without any issue.

Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Priyanka Jain priyanka.jain@nxp.com

---

(no changes since v2)

Changes in v2: - new patch: dm: sysreset: Add a Kconfig option for the 'reset' command

drivers/sysreset/Kconfig | 6 ++++++ drivers/sysreset/sysreset-uclass.c | 2 ++ 2 files changed, 8 insertions(+)

diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig index 0e5c7c9..968dfa4 100644 --- a/drivers/sysreset/Kconfig +++ b/drivers/sysreset/Kconfig @@ -33,6 +33,12 @@ config TPL_SYSRESET

if SYSRESET

+config SYSRESET_CMD_RESET + bool "sysreset implementation of the reset command" + default y + help + Enable sysreset implementation of the reset command. + if CMD_POWEROFF

config SYSRESET_CMD_POWEROFF diff --git a/drivers/sysreset/sysreset-uclass.c b/drivers/sysreset/sysreset-uclass.c index a9908eb..6c9dc7a 100644 --- a/drivers/sysreset/sysreset-uclass.c +++ b/drivers/sysreset/sysreset-uclass.c @@ -119,6 +119,7 @@ void reset_cpu(ulong addr) }

+#if IS_ENABLED(CONFIG_SYSRESET_CMD_RESET) int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { printf("resetting ...\n"); @@ -128,6 +129,7 @@ int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])

return 0; } +#endif

#if IS_ENABLED(CONFIG_SYSRESET_CMD_POWEROFF) int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])

The QEMU ppce500 target provides the power off functionality via the GPIO pin#0, and we can support this using the sysreset gpio poweroff driver. Let's enable it.

Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Priyanka Jain priyanka.jain@nxp.com

---

(no changes since v2)

Changes in v2: - new patch: ppc: qemu: Enable support for power off via GPIO

configs/qemu-ppce500_defconfig | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig index c5e2ad3..8798db6 100644 --- a/configs/qemu-ppce500_defconfig +++ b/configs/qemu-ppce500_defconfig @@ -1,7 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xf01000 CONFIG_ENV_SIZE=0x2000 -CONFIG_DM_GPIO=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_QEMU_PPCE500=y @@ -18,6 +17,7 @@ CONFIG_CMD_GREPENV=y CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y CONFIG_CMD_PCI=y +CONFIG_CMD_POWEROFF=y CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y # CONFIG_CMD_HASH is not set @@ -38,6 +38,10 @@ CONFIG_DM_PCI=y CONFIG_PCI_MPC85XX=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y +CONFIG_SYSRESET=y +# CONFIG_SYSRESET_CMD_RESET is not set +CONFIG_SYSRESET_CMD_POWEROFF=y +CONFIG_POWEROFF_GPIO=y CONFIG_VIRTIO_PCI=y CONFIG_VIRTIO_NET=y CONFIG_VIRTIO_BLK=y

After U-Boot is relocated to RAM already, the previous temporary FDT virtual-physical mapping that was used in the pre-relocation phase is no longer needed. Let's delete the mapping.

get_fdt_virt() might be used before and after relocation, update it to return different virtual address of FDT.

Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Priyanka Jain priyanka.jain@nxp.com

---

(no changes since v2)

Changes in v2: - new patch: ppc: qemu: Delete the temporary FDT virtual-physical mapping after U-Boot is relocated

board/freescale/qemu-ppce500/qemu-ppce500.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/board/freescale/qemu-ppce500/qemu-ppce500.c b/board/freescale/qemu-ppce500/qemu-ppce500.c index 9c30c12..480776a 100644 --- a/board/freescale/qemu-ppce500/qemu-ppce500.c +++ b/board/freescale/qemu-ppce500/qemu-ppce500.c @@ -31,7 +31,10 @@ DECLARE_GLOBAL_DATA_PTR;

static void *get_fdt_virt(void) { - return (void *)CONFIG_SYS_TMPVIRT; + if (gd->flags & GD_FLG_RELOC) + return (void *)gd->fdt_blob; + else + return (void *)CONFIG_SYS_TMPVIRT; }

static uint64_t get_fdt_phys(void) @@ -138,6 +141,12 @@ int misc_init_r(void) */ virtio_init();

+ /* + * U-Boot is relocated to RAM already, let's delete the temporary FDT + * virtual-physical mapping that was used in the pre-relocation phase. + */ + disable_tlb(find_tlb_idx((void *)CONFIG_SYS_TMPVIRT, 1)); + return 0; }

This function is not called anywhere. Only fsl_ddr_sdram_size() is necessary [1] for QEMU. Drop it.

[1] arch/powerpc/cpu/mpc85xx/cpu.c::dram_init()

Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Priyanka Jain priyanka.jain@nxp.com

---

(no changes since v2)

Changes in v2: - new patch: ppc: qemu: Drop fixed_sdram()

board/freescale/qemu-ppce500/qemu-ppce500.c | 5 ----- 1 file changed, 5 deletions(-)

diff --git a/board/freescale/qemu-ppce500/qemu-ppce500.c b/board/freescale/qemu-ppce500/qemu-ppce500.c index 202b7f6..7d711b8 100644 --- a/board/freescale/qemu-ppce500/qemu-ppce500.c +++ b/board/freescale/qemu-ppce500/qemu-ppce500.c @@ -187,11 +187,6 @@ static uint64_t get_linear_ram_size(void) panic("Couldn't determine RAM size"); }

-phys_size_t fixed_sdram(void) -{ - return get_linear_ram_size(); -} - phys_size_t fsl_ddr_sdram_size(void) { return get_linear_ram_size();

Add a reST document to describe how to build and run U-Boot for the QEMU ppce500 machine.

Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Priyanka Jain priyanka.jain@nxp.com

---

Changes in v3: - rebase on top of u-boot/master

Changes in v2: - add descriptions for VirtIO BLK, RTC and power off

doc/board/emulation/index.rst | 1 + doc/board/emulation/qemu-ppce500.rst | 88 ++++++++++++++++++++++++++++++++++++ 2 files changed, 89 insertions(+) create mode 100644 doc/board/emulation/qemu-ppce500.rst

diff --git a/doc/board/emulation/index.rst b/doc/board/emulation/index.rst index a09ead1..be66b6b 100644 --- a/doc/board/emulation/index.rst +++ b/doc/board/emulation/index.rst @@ -8,6 +8,7 @@ Emulation

qemu-arm qemu-mips + qemu-ppce500 qemu-riscv qemu-x86 qemu_capsule_update diff --git a/doc/board/emulation/qemu-ppce500.rst b/doc/board/emulation/qemu-ppce500.rst new file mode 100644 index 0000000..0a5c86c --- /dev/null +++ b/doc/board/emulation/qemu-ppce500.rst @@ -0,0 +1,88 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. Copyright (C) 2021, Bin Meng bmeng.cn@gmail.com + +QEMU PPC E500 +============= + +QEMU for PPC supports a special 'ppce500' machine designed for emulation and +virtualization purposes. This document describes how to run U-Boot under it. + +The QEMU ppce500 machine models a generic PowerPC E500 virtual machine with +support for the VirtIO standard networking device connected to the built-in +PCI host controller. Some common devices in the CCSBAR space are modeled, +including MPIC, 16550A UART devices, GPIO, I2C and PCI host controller with +MSI delivery to MPIC. It uses device-tree to pass configuration information +to guest software. + +Building U-Boot +--------------- +Set the CROSS_COMPILE environment variable as usual, and run:: + + $ make qemu-ppce500_defconfig + $ make + +Running U-Boot +-------------- +The minimal QEMU command line to get U-Boot up and running is:: + + $ qemu-system-ppc -nographic -machine ppce500 -bios u-boot + +You can also run U-Boot using 'qemu-system-ppc64':: + + $ qemu-system-ppc64 -nographic -machine ppce500 -bios u-boot + +The commands above create a target with 128 MiB memory by default. A freely +configurable amount of RAM can be created via the '-m' parameter. For example, +'-m 2G' creates 2 GiB memory for the target, and the memory node in the +embedded DTB created by QEMU reflects the new setting. + +Both qemu-system-ppc and qemu-system-ppc64 provide emulation for the following +32-bit PowerPC CPUs: + +* e500v2 +* e500mc + +Additionally qemu-system-ppc64 provides support for the following 64-bit CPUs: + +* e5500 +* e6500 + +The CPU type can be specified via the '-cpu' command line. If not specified, +it creates a machine with e500v2 core. The following example shows an e6500 +based machine creation:: + + $ qemu-system-ppc64 -nographic -machine ppce500 -cpu e6500 -bios u-boot + +When U-Boot boots, you will notice the following:: + + CPU: Unknown, Version: 0.0, (0x00000000) + Core: e6500, Version: 2.0, (0x80400020) + +This is because we only specified a core name to QEMU and it does not have a +meaningful SVR value which represents an actual SoC that integrates such core. +You can specify a real world SoC device that QEMU has built-in support but all +these SoCs are e500v2 based MPC85xx series, hence you cannot test anything +built for P4080 (e500mc), P5020 (e5500) and T2080 (e6500). + +By default a VirtIO standard PCI networking device is connected as an ethernet +interface at PCI address 0.1.0, but we can switch that to an e1000 NIC by:: + + $ qemu-system-ppc -nographic -machine ppce500 -bios u-boot \ + -nic tap,ifname=tap0,script=no,downscript=no,model=e1000 + +VirtIO BLK driver is also enabled to support booting from a disk image where +a kernel image is stored. Append the following to QEMU:: + + -drive file=disk.img,format=raw,id=disk0 -device virtio-blk-pci,drive=disk0 + +Pericom pt7c4338 RTC is supported so we can use the 'date' command:: + + => date + Date: 2021-02-18 (Thursday) Time: 15:33:20 + +Additionally, 'poweroff' command is supported to shut down the QEMU session:: + + => poweroff + poweroff ... + +These have been tested in QEMU 5.2.0.