[U-Boot] [PATCH 0/4] ARM: dts: uniphier: add additional required properties for ethernet nodes
According to the modification of linux-next, add required clocks and their names, resets and their names, and system controller properties to fix the activation issues for the ethernet controllers implemented on some UniPhier SoCs.
Kunihiko Hayashi (4): ARM: dts: uniphier: add syscon-phy-mode property to each ethernet node ARM: dts: uniphier: add required clocks and resets to Pro4 ethernet node ARM: dts: uniphier: add clock-names and reset-names to ethernet node ARM: dts: uniphier: change phy-mode to 'internal' for LD11
arch/arm/dts/uniphier-ld11.dtsi | 5 ++++- arch/arm/dts/uniphier-ld20.dtsi | 3 +++ arch/arm/dts/uniphier-pro4.dtsi | 10 +++++++--- arch/arm/dts/uniphier-pxs2.dtsi | 3 +++ arch/arm/dts/uniphier-pxs3.dtsi | 6 ++++++ 5 files changed, 23 insertions(+), 4 deletions(-)
Add syscon-phy-mode property specifying a phandle of system controller to each ethernet node.
Signed-off-by: Kunihiko Hayashi hayashi.kunihiko@socionext.com --- arch/arm/dts/uniphier-ld11.dtsi | 1 + arch/arm/dts/uniphier-ld20.dtsi | 1 + arch/arm/dts/uniphier-pro4.dtsi | 3 ++- arch/arm/dts/uniphier-pxs2.dtsi | 1 + arch/arm/dts/uniphier-pxs3.dtsi | 2 ++ 5 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi index bf3118e..6247281 100644 --- a/arch/arm/dts/uniphier-ld11.dtsi +++ b/arch/arm/dts/uniphier-ld11.dtsi @@ -557,6 +557,7 @@ resets = <&sys_rst 6>; phy-mode = "rmii"; local-mac-address = [00 00 00 00 00 00]; + socionext,syscon-phy-mode = <&soc_glue 0>;
mdio: mdio { #address-cells = <1>; diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi index 5a80514..fe7e921 100644 --- a/arch/arm/dts/uniphier-ld20.dtsi +++ b/arch/arm/dts/uniphier-ld20.dtsi @@ -626,6 +626,7 @@ resets = <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; + socionext,syscon-phy-mode = <&soc_glue 0>;
mdio: mdio { #address-cells = <1>; diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi index 25c4b4f..041e451 100644 --- a/arch/arm/dts/uniphier-pro4.dtsi +++ b/arch/arm/dts/uniphier-pro4.dtsi @@ -342,7 +342,7 @@ has-transaction-translator; };
- soc-glue@5f800000 { + soc_glue: soc-glue@5f800000 { compatible = "socionext,uniphier-pro4-soc-glue", "simple-mfd", "syscon"; reg = <0x5f800000 0x2000>; @@ -431,6 +431,7 @@ resets = <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; + socionext,syscon-phy-mode = <&soc_glue 0>;
mdio: mdio { #address-cells = <1>; diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi index 9760f79..5cef163 100644 --- a/arch/arm/dts/uniphier-pxs2.dtsi +++ b/arch/arm/dts/uniphier-pxs2.dtsi @@ -549,6 +549,7 @@ resets = <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; + socionext,syscon-phy-mode = <&soc_glue 0>;
mdio: mdio { #address-cells = <1>; diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi index d4c458a..6158bd2 100644 --- a/arch/arm/dts/uniphier-pxs3.dtsi +++ b/arch/arm/dts/uniphier-pxs3.dtsi @@ -434,6 +434,7 @@ resets = <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; + socionext,syscon-phy-mode = <&soc_glue 0>;
mdio0: mdio { #address-cells = <1>; @@ -452,6 +453,7 @@ resets = <&sys_rst 7>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; + socionext,syscon-phy-mode = <&soc_glue 1>;
mdio1: mdio { #address-cells = <1>;
The GIO clock/reset, another MAC clock, and the PHY clock are required for the ethernet of Pro4 SoC.
Signed-off-by: Kunihiko Hayashi hayashi.kunihiko@socionext.com --- arch/arm/dts/uniphier-pro4.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi index 041e451..e990aed 100644 --- a/arch/arm/dts/uniphier-pro4.dtsi +++ b/arch/arm/dts/uniphier-pro4.dtsi @@ -427,8 +427,9 @@ interrupts = <0 66 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ether_rgmii>; - clocks = <&sys_clk 6>; - resets = <&sys_rst 6>; + clocks = <&sys_clk 12>, <&sys_clk 6>, <&sys_clk 7>, + <&sys_clk 10>; + resets = <&sys_rst 12>, <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; socionext,syscon-phy-mode = <&soc_glue 0>;
Add clock-names and reset-names because this node recognizes multiple clocks and resets. ("ether", and so on, for each)
Signed-off-by: Kunihiko Hayashi hayashi.kunihiko@socionext.com --- arch/arm/dts/uniphier-ld11.dtsi | 2 ++ arch/arm/dts/uniphier-ld20.dtsi | 2 ++ arch/arm/dts/uniphier-pro4.dtsi | 2 ++ arch/arm/dts/uniphier-pxs2.dtsi | 2 ++ arch/arm/dts/uniphier-pxs3.dtsi | 4 ++++ 5 files changed, 12 insertions(+)
diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi index 6247281..bedd0e0 100644 --- a/arch/arm/dts/uniphier-ld11.dtsi +++ b/arch/arm/dts/uniphier-ld11.dtsi @@ -553,7 +553,9 @@ status = "disabled"; reg = <0x65000000 0x8500>; interrupts = <0 66 4>; + clock-names = "ether"; clocks = <&sys_clk 6>; + reset-names = "ether"; resets = <&sys_rst 6>; phy-mode = "rmii"; local-mac-address = [00 00 00 00 00 00]; diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi index fe7e921..6d18d16 100644 --- a/arch/arm/dts/uniphier-ld20.dtsi +++ b/arch/arm/dts/uniphier-ld20.dtsi @@ -622,7 +622,9 @@ interrupts = <0 66 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ether_rgmii>; + clock-names = "ether"; clocks = <&sys_clk 6>; + reset-names = "ether"; resets = <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi index e990aed..0004863 100644 --- a/arch/arm/dts/uniphier-pro4.dtsi +++ b/arch/arm/dts/uniphier-pro4.dtsi @@ -427,8 +427,10 @@ interrupts = <0 66 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ether_rgmii>; + clock-names = "gio", "ether", "ether-gb", "ether-phy"; clocks = <&sys_clk 12>, <&sys_clk 6>, <&sys_clk 7>, <&sys_clk 10>; + reset-names = "gio", "ether"; resets = <&sys_rst 12>, <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi index 5cef163..20f3935 100644 --- a/arch/arm/dts/uniphier-pxs2.dtsi +++ b/arch/arm/dts/uniphier-pxs2.dtsi @@ -545,7 +545,9 @@ interrupts = <0 66 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ether_rgmii>; + clock-names = "ether"; clocks = <&sys_clk 6>; + reset-names = "ether"; resets = <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi index 6158bd2..7b51165 100644 --- a/arch/arm/dts/uniphier-pxs3.dtsi +++ b/arch/arm/dts/uniphier-pxs3.dtsi @@ -430,7 +430,9 @@ interrupts = <0 66 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ether_rgmii>; + clock-names = "ether"; clocks = <&sys_clk 6>; + reset-names = "ether"; resets = <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; @@ -449,7 +451,9 @@ interrupts = <0 67 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ether1_rgmii>; + clock-names = "ether"; clocks = <&sys_clk 7>; + reset-names = "ether"; resets = <&sys_rst 7>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00];
Change the phy-mode property to 'internal' that means to use a built-in PHY implemented on LD11 SoC.
Signed-off-by: Kunihiko Hayashi hayashi.kunihiko@socionext.com --- arch/arm/dts/uniphier-ld11.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi index bedd0e0..577803b 100644 --- a/arch/arm/dts/uniphier-ld11.dtsi +++ b/arch/arm/dts/uniphier-ld11.dtsi @@ -557,7 +557,7 @@ clocks = <&sys_clk 6>; reset-names = "ether"; resets = <&sys_rst 6>; - phy-mode = "rmii"; + phy-mode = "internal"; local-mac-address = [00 00 00 00 00 00]; socionext,syscon-phy-mode = <&soc_glue 0>;
2018-05-11 18:49 GMT+09:00 Kunihiko Hayashi hayashi.kunihiko@socionext.com:
According to the modification of linux-next, add required clocks and their names, resets and their names, and system controller properties to fix the activation issues for the ethernet controllers implemented on some UniPhier SoCs.
Kunihiko Hayashi (4): ARM: dts: uniphier: add syscon-phy-mode property to each ethernet node ARM: dts: uniphier: add required clocks and resets to Pro4 ethernet node ARM: dts: uniphier: add clock-names and reset-names to ethernet node ARM: dts: uniphier: change phy-mode to 'internal' for LD11
Applied to u-boot-uniphier. Thanks.
arch/arm/dts/uniphier-ld11.dtsi | 5 ++++- arch/arm/dts/uniphier-ld20.dtsi | 3 +++ arch/arm/dts/uniphier-pro4.dtsi | 10 +++++++--- arch/arm/dts/uniphier-pxs2.dtsi | 3 +++ arch/arm/dts/uniphier-pxs3.dtsi | 6 ++++++ 5 files changed, 23 insertions(+), 4 deletions(-)
-- 2.7.4
U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
participants (2)
-
Kunihiko Hayashi -
Masahiro Yamada