[U-Boot] [PATCH 1/7] arm: socfpga: Allow DWC2 UDC probing from OF

The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it.
Signed-off-by: Marek Vasut marex@denx.de Cc: Simon Glass sjg@chromium.org Cc: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Lukasz Majewski l.majewski@majess.pl Cc: Lukasz Majewski l.majewski@samsung.com --- include/fdtdec.h | 1 + lib/fdtdec.c | 1 + 2 files changed, 2 insertions(+)
diff --git a/include/fdtdec.h b/include/fdtdec.h index 7fe657d..d82dc35 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -167,6 +167,7 @@ enum fdt_compat_id { COMPAT_INTEL_IRQ_ROUTER, /* Intel Interrupt Router */ COMPAT_ALTERA_SOCFPGA_DWMAC, /* SoCFPGA Ethernet controller */ COMPAT_ALTERA_SOCFPGA_DWMMC, /* SoCFPGA DWMMC controller */ + COMPAT_ALTERA_SOCFPGA_DWC2USB, /* SoCFPGA DWC2 USB controller */ COMPAT_INTEL_BAYTRAIL_FSP, /* Intel Bay Trail FSP */ COMPAT_INTEL_BAYTRAIL_FSP_MDP, /* Intel FSP memory-down params */
diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 82d0090..ae0b708 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -71,6 +71,7 @@ static const char * const compat_names[COMPAT_COUNT] = { COMPAT(COMPAT_INTEL_IRQ_ROUTER, "intel,irq-router"), COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"), COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"), + COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"), COMPAT(COMPAT_INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"), COMPAT(COMPAT_INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"), };

This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
Signed-off-by: Marek Vasut marex@denx.de Cc: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Lukasz Majewski l.majewski@majess.pl Cc: Lukasz Majewski l.majewski@samsung.com --- arch/arm/dts/socfpga_arria5_socdk.dts | 1 + board/altera/arria5-socdk/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_arria5_defconfig | 2 ++ include/configs/socfpga_arria5_socdk.h | 3 --- 4 files changed, 22 insertions(+), 5 deletions(-)
diff --git a/arch/arm/dts/socfpga_arria5_socdk.dts b/arch/arm/dts/socfpga_arria5_socdk.dts index 7d1836e..5933a40 100644 --- a/arch/arm/dts/socfpga_arria5_socdk.dts +++ b/arch/arm/dts/socfpga_arria5_socdk.dts @@ -25,6 +25,7 @@ * to be added to the gmac1 device tree blob. */ ethernet0 = &gmac1; + udc0 = &usb1; };
regulator_3_3v: 3-3-v-regulator { diff --git a/board/altera/arria5-socdk/socfpga.c b/board/altera/arria5-socdk/socfpga.c index ccb1b4b..449f3b5 100644 --- a/board/altera/arria5-socdk/socfpga.c +++ b/board/altera/arria5-socdk/socfpga.c @@ -5,12 +5,12 @@ */
#include <common.h> +#include <errno.h> #include <asm/arch/reset_manager.h> #include <asm/io.h>
#include <usb.h> #include <usb/dwc2_udc.h> -#include <usb_mass_storage.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -29,12 +29,29 @@ int board_init(void)
#ifdef CONFIG_USB_GADGET struct dwc2_plat_otg_data socfpga_otg_data = { - .regs_otg = CONFIG_USB_DWC2_REG_ADDR, .usb_gusbcfg = 0x1417, };
int board_usb_init(int index, enum usb_init_type init) { + int node[2], count; + fdt_addr_t addr; + + count = fdtdec_find_aliases_for_id(gd->fdt_blob, "udc", + COMPAT_ALTERA_SOCFPGA_DWC2USB, + node, 2); + if (count <= 0) /* No controller found. */ + return 0; + + addr = fdtdec_get_addr(gd->fdt_blob, node[0], "reg"); + if (addr == FDT_ADDR_T_NONE) { + printf("UDC Controller has no 'reg' property!\n"); + return -EINVAL; + } + + /* Patch the address from OF into the controller pdata. */ + socfpga_otg_data.regs_otg = addr; + return dwc2_udc_probe(&socfpga_otg_data); }
diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index f59bc00..10eb91d 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -21,3 +21,5 @@ CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/include/configs/socfpga_arria5_socdk.h b/include/configs/socfpga_arria5_socdk.h index 465df54..d2411e6 100644 --- a/include/configs/socfpga_arria5_socdk.h +++ b/include/configs/socfpga_arria5_socdk.h @@ -56,9 +56,6 @@ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */
/* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif #define CONFIG_G_DNL_MANUFACTURER "Altera"
/* Extra Environment */

On Sat, 2015-12-05 at 21:43 +0100, Marek Vasut wrote:
This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard -coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
Signed-off-by: Marek Vasut marex@denx.de Cc: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Lukasz Majewski l.majewski@majess.pl Cc: Lukasz Majewski l.majewski@samsung.com
arch/arm/dts/socfpga_arria5_socdk.dts | 1 + board/altera/arria5-socdk/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_arria5_defconfig | 2 ++ include/configs/socfpga_arria5_socdk.h | 3 --- 4 files changed, 22 insertions(+), 5 deletions(-)
Acked-by: Chin Liang See clsee@altera.com
Thanks Chin Liang

This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
Signed-off-by: Marek Vasut marex@denx.de Cc: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Lukasz Majewski l.majewski@majess.pl Cc: Lukasz Majewski l.majewski@samsung.com --- arch/arm/dts/socfpga_cyclone5_socdk.dts | 9 +++++---- board/altera/cyclone5-socdk/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_cyclone5_defconfig | 2 ++ include/configs/socfpga_cyclone5_socdk.h | 3 --- 4 files changed, 26 insertions(+), 9 deletions(-)
diff --git a/arch/arm/dts/socfpga_cyclone5_socdk.dts b/arch/arm/dts/socfpga_cyclone5_socdk.dts index 9eb5a22..224928f 100644 --- a/arch/arm/dts/socfpga_cyclone5_socdk.dts +++ b/arch/arm/dts/socfpga_cyclone5_socdk.dts @@ -25,6 +25,7 @@ * to be added to the gmac1 device tree blob. */ ethernet0 = &gmac1; + udc0 = &usb1; };
regulator_3_3v: 3-3-v-regulator { @@ -77,10 +78,6 @@ vqmmc-supply = <®ulator_3_3v>; };
-&usb1 { - status = "okay"; -}; - &qspi { status = "okay";
@@ -100,3 +97,7 @@ tslch-ns = <4>; }; }; + +&usb1 { + status = "okay"; +}; diff --git a/board/altera/cyclone5-socdk/socfpga.c b/board/altera/cyclone5-socdk/socfpga.c index ccb1b4b..449f3b5 100644 --- a/board/altera/cyclone5-socdk/socfpga.c +++ b/board/altera/cyclone5-socdk/socfpga.c @@ -5,12 +5,12 @@ */
#include <common.h> +#include <errno.h> #include <asm/arch/reset_manager.h> #include <asm/io.h>
#include <usb.h> #include <usb/dwc2_udc.h> -#include <usb_mass_storage.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -29,12 +29,29 @@ int board_init(void)
#ifdef CONFIG_USB_GADGET struct dwc2_plat_otg_data socfpga_otg_data = { - .regs_otg = CONFIG_USB_DWC2_REG_ADDR, .usb_gusbcfg = 0x1417, };
int board_usb_init(int index, enum usb_init_type init) { + int node[2], count; + fdt_addr_t addr; + + count = fdtdec_find_aliases_for_id(gd->fdt_blob, "udc", + COMPAT_ALTERA_SOCFPGA_DWC2USB, + node, 2); + if (count <= 0) /* No controller found. */ + return 0; + + addr = fdtdec_get_addr(gd->fdt_blob, node[0], "reg"); + if (addr == FDT_ADDR_T_NONE) { + printf("UDC Controller has no 'reg' property!\n"); + return -EINVAL; + } + + /* Patch the address from OF into the controller pdata. */ + socfpga_otg_data.regs_otg = addr; + return dwc2_udc_probe(&socfpga_otg_data); }
diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index c0d6913..864358c 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -21,3 +21,5 @@ CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/include/configs/socfpga_cyclone5_socdk.h b/include/configs/socfpga_cyclone5_socdk.h index 5e4a709..76d29a3 100644 --- a/include/configs/socfpga_cyclone5_socdk.h +++ b/include/configs/socfpga_cyclone5_socdk.h @@ -56,9 +56,6 @@ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */
/* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif #define CONFIG_G_DNL_MANUFACTURER "Altera"
/* Extra Environment */

On Sat, 2015-12-05 at 21:43 +0100, Marek Vasut wrote:
This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard -coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
Signed-off-by: Marek Vasut marex@denx.de Cc: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Lukasz Majewski l.majewski@majess.pl Cc: Lukasz Majewski l.majewski@samsung.com
arch/arm/dts/socfpga_cyclone5_socdk.dts | 9 +++++---- board/altera/cyclone5-socdk/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_cyclone5_defconfig | 2 ++ include/configs/socfpga_cyclone5_socdk.h | 3 --- 4 files changed, 26 insertions(+), 9 deletions(-)
Acked-by: Chin Liang See clsee@altera.com
Thanks Chin Liang

This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
Signed-off-by: Marek Vasut marex@denx.de Cc: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Lukasz Majewski l.majewski@majess.pl Cc: Lukasz Majewski l.majewski@samsung.com --- arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts | 5 +++++ configs/socfpga_de0_nano_soc_defconfig | 2 ++ include/configs/socfpga_de0_nano_soc.h | 3 --- 3 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts index b649c9a..dc09bed 100644 --- a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts +++ b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts @@ -16,6 +16,7 @@
aliases { ethernet0 = &gmac1; + udc0 = &usb1; };
memory { @@ -59,3 +60,7 @@ status = "okay"; u-boot,dm-pre-reloc; }; + +&usb1 { + status = "okay"; +}; diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig index a4f75e6..65c1197 100644 --- a/configs/socfpga_de0_nano_soc_defconfig +++ b/configs/socfpga_de0_nano_soc_defconfig @@ -19,3 +19,5 @@ CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/include/configs/socfpga_de0_nano_soc.h b/include/configs/socfpga_de0_nano_soc.h index 870192d..d27aa9b 100644 --- a/include/configs/socfpga_de0_nano_soc.h +++ b/include/configs/socfpga_de0_nano_soc.h @@ -56,9 +56,6 @@ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */
/* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif #define CONFIG_G_DNL_MANUFACTURER "Terasic"
/* Extra Environment */

On Sat, 2015-12-05 at 21:43 +0100, Marek Vasut wrote:
This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard -coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
Signed-off-by: Marek Vasut marex@denx.de Cc: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Lukasz Majewski l.majewski@majess.pl Cc: Lukasz Majewski l.majewski@samsung.com
arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts | 5 +++++ configs/socfpga_de0_nano_soc_defconfig | 2 ++ include/configs/socfpga_de0_nano_soc.h | 3 --- 3 files changed, 7 insertions(+), 3 deletions(-)
Reviewed-by: Chin Liang See clsee@altera.com
Thanks Chin Liang

This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
Signed-off-by: Marek Vasut marex@denx.de Cc: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Lukasz Majewski l.majewski@majess.pl Cc: Lukasz Majewski l.majewski@samsung.com --- arch/arm/dts/socfpga_cyclone5_mcvevk.dts | 5 +++++ board/denx/mcvevk/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_mcvevk_defconfig | 2 ++ include/configs/socfpga_mcvevk.h | 3 --- 4 files changed, 26 insertions(+), 5 deletions(-)
diff --git a/arch/arm/dts/socfpga_cyclone5_mcvevk.dts b/arch/arm/dts/socfpga_cyclone5_mcvevk.dts index e1e3d73..7d3f989 100644 --- a/arch/arm/dts/socfpga_cyclone5_mcvevk.dts +++ b/arch/arm/dts/socfpga_cyclone5_mcvevk.dts @@ -16,6 +16,7 @@
aliases { ethernet0 = &gmac0; + udc0 = &usb1; };
memory { @@ -51,3 +52,7 @@ bus-width = <8>; u-boot,dm-pre-reloc; }; + +&usb1 { + status = "okay"; +}; diff --git a/board/denx/mcvevk/socfpga.c b/board/denx/mcvevk/socfpga.c index 0f93722..d77d7ad 100644 --- a/board/denx/mcvevk/socfpga.c +++ b/board/denx/mcvevk/socfpga.c @@ -5,12 +5,12 @@ */
#include <common.h> +#include <errno.h> #include <asm/arch/reset_manager.h> #include <asm/io.h>
#include <usb.h> #include <usb/dwc2_udc.h> -#include <usb_mass_storage.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -29,12 +29,29 @@ int board_init(void)
#ifdef CONFIG_USB_GADGET struct dwc2_plat_otg_data socfpga_otg_data = { - .regs_otg = CONFIG_USB_DWC2_REG_ADDR, .usb_gusbcfg = 0x1417, };
int board_usb_init(int index, enum usb_init_type init) { + int node[2], count; + fdt_addr_t addr; + + count = fdtdec_find_aliases_for_id(gd->fdt_blob, "udc", + COMPAT_ALTERA_SOCFPGA_DWC2USB, + node, 2); + if (count <= 0) /* No controller found. */ + return 0; + + addr = fdtdec_get_addr(gd->fdt_blob, node[0], "reg"); + if (addr == FDT_ADDR_T_NONE) { + printf("UDC Controller has no 'reg' property!\n"); + return -EINVAL; + } + + /* Patch the address from OF into the controller pdata. */ + socfpga_otg_data.regs_otg = addr; + return dwc2_udc_probe(&socfpga_otg_data); }
diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig index 382db65..c98d4a1 100644 --- a/configs/socfpga_mcvevk_defconfig +++ b/configs/socfpga_mcvevk_defconfig @@ -19,3 +19,5 @@ CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/include/configs/socfpga_mcvevk.h b/include/configs/socfpga_mcvevk.h index d051eec..b2c1f75 100644 --- a/include/configs/socfpga_mcvevk.h +++ b/include/configs/socfpga_mcvevk.h @@ -49,9 +49,6 @@ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */
/* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif #define CONFIG_G_DNL_MANUFACTURER "DENX"
/* Extra Environment */

On Sat, 2015-12-05 at 21:43 +0100, Marek Vasut wrote:
This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard -coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
Signed-off-by: Marek Vasut marex@denx.de Cc: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Lukasz Majewski l.majewski@majess.pl Cc: Lukasz Majewski l.majewski@samsung.com
arch/arm/dts/socfpga_cyclone5_mcvevk.dts | 5 +++++ board/denx/mcvevk/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_mcvevk_defconfig | 2 ++ include/configs/socfpga_mcvevk.h | 3 --- 4 files changed, 26 insertions(+), 5 deletions(-)
Reviewed-by: Chin Liang See clsee@altera.com
Thanks Chin Liang

This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
Signed-off-by: Marek Vasut marex@denx.de Cc: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Lukasz Majewski l.majewski@majess.pl Cc: Lukasz Majewski l.majewski@samsung.com --- arch/arm/dts/socfpga_cyclone5_sockit.dts | 9 +++++++-- board/terasic/sockit/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_sockit_defconfig | 2 ++ include/configs/socfpga_sockit.h | 3 --- 4 files changed, 28 insertions(+), 7 deletions(-)
diff --git a/arch/arm/dts/socfpga_cyclone5_sockit.dts b/arch/arm/dts/socfpga_cyclone5_sockit.dts index d7c41c8..e45c2ab 100644 --- a/arch/arm/dts/socfpga_cyclone5_sockit.dts +++ b/arch/arm/dts/socfpga_cyclone5_sockit.dts @@ -14,9 +14,10 @@ bootargs = "console=ttyS0,115200"; };
- aliases { + aliases { ethernet0 = &gmac1; - }; + udc0 = &usb1; + };
memory { name = "memory"; @@ -90,3 +91,7 @@ tslch-ns = <4>; }; }; + +&usb1 { + status = "okay"; +}; diff --git a/board/terasic/sockit/socfpga.c b/board/terasic/sockit/socfpga.c index ccb1b4b..1fe8c1c 100644 --- a/board/terasic/sockit/socfpga.c +++ b/board/terasic/sockit/socfpga.c @@ -5,12 +5,12 @@ */
#include <common.h> +#include <errno.h> #include <asm/arch/reset_manager.h> #include <asm/io.h>
#include <usb.h> #include <usb/dwc2_udc.h> -#include <usb_mass_storage.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -29,12 +29,29 @@ int board_init(void)
#ifdef CONFIG_USB_GADGET struct dwc2_plat_otg_data socfpga_otg_data = { - .regs_otg = CONFIG_USB_DWC2_REG_ADDR, .usb_gusbcfg = 0x1417, };
int board_usb_init(int index, enum usb_init_type init) { + int node[2], count; + fdt_addr_t addr; + + count = fdtdec_find_aliases_for_id(gd->fdt_blob, "udc", + COMPAT_ALTERA_SOCFPGA_DWC2USB, + node, 2); + if (count <= 0) /* No controller found. */ + return -EINVAL; + + addr = fdtdec_get_addr(gd->fdt_blob, node[0], "reg"); + if (addr == FDT_ADDR_T_NONE) { + printf("UDC Controller has no 'reg' property!\n"); + return -EINVAL; + } + + /* Patch the address from OF into the controller pdata. */ + socfpga_otg_data.regs_otg = addr; + return dwc2_udc_probe(&socfpga_otg_data); }
diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index 03f8eff..b4f41a9 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -23,3 +23,5 @@ CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/include/configs/socfpga_sockit.h b/include/configs/socfpga_sockit.h index c1178ac..eefe01c 100644 --- a/include/configs/socfpga_sockit.h +++ b/include/configs/socfpga_sockit.h @@ -56,9 +56,6 @@ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */
/* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif #define CONFIG_G_DNL_MANUFACTURER "Terasic"
/* Extra Environment */

On Sat, 2015-12-05 at 21:43 +0100, Marek Vasut wrote:
This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard -coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
Signed-off-by: Marek Vasut marex@denx.de Cc: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Lukasz Majewski l.majewski@majess.pl Cc: Lukasz Majewski l.majewski@samsung.com
arch/arm/dts/socfpga_cyclone5_sockit.dts | 9 +++++++-- board/terasic/sockit/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_sockit_defconfig | 2 ++ include/configs/socfpga_sockit.h | 3 --- 4 files changed, 28 insertions(+), 7 deletions(-)
Reviewed-by: Chin Liang See clsee@altera.com
Thanks Chin Liang

This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
Signed-off-by: Marek Vasut marex@denx.de Cc: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Lukasz Majewski l.majewski@majess.pl Cc: Lukasz Majewski l.majewski@samsung.com --- arch/arm/dts/socfpga_cyclone5_socrates.dts | 8 ++++++++ board/ebv/socrates/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_socrates_defconfig | 2 ++ include/configs/socfpga_socrates.h | 3 --- 4 files changed, 29 insertions(+), 5 deletions(-)
diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts index a18d168..591d96c 100644 --- a/arch/arm/dts/socfpga_cyclone5_socrates.dts +++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts @@ -14,6 +14,10 @@ bootargs = "console=ttyS0,115200"; };
+ aliases { + udc0 = &usb1; + }; + memory { name = "memory"; device_type = "memory"; @@ -72,3 +76,7 @@ tslch-ns = <4>; }; }; + +&usb1 { + status = "okay"; +}; diff --git a/board/ebv/socrates/socfpga.c b/board/ebv/socrates/socfpga.c index ccb1b4b..449f3b5 100644 --- a/board/ebv/socrates/socfpga.c +++ b/board/ebv/socrates/socfpga.c @@ -5,12 +5,12 @@ */
#include <common.h> +#include <errno.h> #include <asm/arch/reset_manager.h> #include <asm/io.h>
#include <usb.h> #include <usb/dwc2_udc.h> -#include <usb_mass_storage.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -29,12 +29,29 @@ int board_init(void)
#ifdef CONFIG_USB_GADGET struct dwc2_plat_otg_data socfpga_otg_data = { - .regs_otg = CONFIG_USB_DWC2_REG_ADDR, .usb_gusbcfg = 0x1417, };
int board_usb_init(int index, enum usb_init_type init) { + int node[2], count; + fdt_addr_t addr; + + count = fdtdec_find_aliases_for_id(gd->fdt_blob, "udc", + COMPAT_ALTERA_SOCFPGA_DWC2USB, + node, 2); + if (count <= 0) /* No controller found. */ + return 0; + + addr = fdtdec_get_addr(gd->fdt_blob, node[0], "reg"); + if (addr == FDT_ADDR_T_NONE) { + printf("UDC Controller has no 'reg' property!\n"); + return -EINVAL; + } + + /* Patch the address from OF into the controller pdata. */ + socfpga_otg_data.regs_otg = addr; + return dwc2_udc_probe(&socfpga_otg_data); }
diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index 932f0e8..fe940f9 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -22,3 +22,5 @@ CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y +CONFIG_USB=y +CONFIG_DM_USB=y diff --git a/include/configs/socfpga_socrates.h b/include/configs/socfpga_socrates.h index de8ced6..1b0888f 100644 --- a/include/configs/socfpga_socrates.h +++ b/include/configs/socfpga_socrates.h @@ -52,9 +52,6 @@ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */
/* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif #define CONFIG_G_DNL_MANUFACTURER "EBV"
/* Extra Environment */

On Sat, 2015-12-05 at 21:43 +0100, Marek Vasut wrote:
This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard -coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
Signed-off-by: Marek Vasut marex@denx.de Cc: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Lukasz Majewski l.majewski@majess.pl Cc: Lukasz Majewski l.majewski@samsung.com
arch/arm/dts/socfpga_cyclone5_socrates.dts | 8 ++++++++ board/ebv/socrates/socfpga.c | 21 +++++++++++++++++++-
configs/socfpga_socrates_defconfig | 2 ++ include/configs/socfpga_socrates.h | 3 --- 4 files changed, 29 insertions(+), 5 deletions(-)
Reviewed-by: Chin Liang See clsee@altera.com
Thanks Chin Liang

On 12/05/2015 02:43 PM, Marek Vasut wrote:
This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
Signed-off-by: Marek Vasut marex@denx.de Cc: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Lukasz Majewski l.majewski@majess.pl Cc: Lukasz Majewski l.majewski@samsung.com
arch/arm/dts/socfpga_cyclone5_socrates.dts | 8 ++++++++ board/ebv/socrates/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_socrates_defconfig | 2 ++ include/configs/socfpga_socrates.h | 3 --- 4 files changed, 29 insertions(+), 5 deletions(-)
<snip>
diff --git a/include/configs/socfpga_socrates.h b/include/configs/socfpga_socrates.h index de8ced6..1b0888f 100644 --- a/include/configs/socfpga_socrates.h +++ b/include/configs/socfpga_socrates.h @@ -52,9 +52,6 @@ #define CONFIG_ENV_OFFSET 512 /* just after the MBR */
/* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif #define CONFIG_G_DNL_MANUFACTURER "EBV"
/* Extra Environment */
With this patch series, I think you should follow up with a patch like below?
---
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index f74c758..b57fd4c 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -233,13 +233,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #ifdef CONFIG_CMD_USB #define CONFIG_USB_DWC2 #define CONFIG_USB_STORAGE -/* - * NOTE: User must define either of the following to select which - * of the two USB controllers available on SoCFPGA to use. - * The DWC2 driver doesn't support multiple USB controllers. - * #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB0_ADDRESS - * #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS - */ #endif
/*
Dinh

On Monday, December 07, 2015 at 10:49:09 PM, Dinh Nguyen wrote:
On 12/05/2015 02:43 PM, Marek Vasut wrote:
This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
Signed-off-by: Marek Vasut marex@denx.de Cc: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Lukasz Majewski l.majewski@majess.pl Cc: Lukasz Majewski l.majewski@samsung.com
arch/arm/dts/socfpga_cyclone5_socrates.dts | 8 ++++++++ board/ebv/socrates/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_socrates_defconfig | 2 ++ include/configs/socfpga_socrates.h | 3 --- 4 files changed, 29 insertions(+), 5 deletions(-)
<snip>
diff --git a/include/configs/socfpga_socrates.h b/include/configs/socfpga_socrates.h index de8ced6..1b0888f 100644 --- a/include/configs/socfpga_socrates.h +++ b/include/configs/socfpga_socrates.h @@ -52,9 +52,6 @@
#define CONFIG_ENV_OFFSET 512 /* just after the MBR */
/* USB */
-#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif
#define CONFIG_G_DNL_MANUFACTURER "EBV"
/* Extra Environment */
With this patch series, I think you should follow up with a patch like below?
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index f74c758..b57fd4c 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -233,13 +233,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #ifdef CONFIG_CMD_USB #define CONFIG_USB_DWC2 #define CONFIG_USB_STORAGE -/*
- NOTE: User must define either of the following to select which
of the two USB controllers available on SoCFPGA to use.
The DWC2 driver doesn't support multiple USB controllers.
- #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB0_ADDRESS
- #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS
- */
#endif
You're right. Can you give me a SoB line on this or submit one ?
Best regards, Marek Vasut

On Mon, Dec 7, 2015 at 4:01 PM, Marek Vasut marex@denx.de wrote:
On Monday, December 07, 2015 at 10:49:09 PM, Dinh Nguyen wrote:
On 12/05/2015 02:43 PM, Marek Vasut wrote:
This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
Signed-off-by: Marek Vasut marex@denx.de Cc: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Lukasz Majewski l.majewski@majess.pl Cc: Lukasz Majewski l.majewski@samsung.com
arch/arm/dts/socfpga_cyclone5_socrates.dts | 8 ++++++++ board/ebv/socrates/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_socrates_defconfig | 2 ++ include/configs/socfpga_socrates.h | 3 --- 4 files changed, 29 insertions(+), 5 deletions(-)
<snip>
diff --git a/include/configs/socfpga_socrates.h b/include/configs/socfpga_socrates.h index de8ced6..1b0888f 100644 --- a/include/configs/socfpga_socrates.h +++ b/include/configs/socfpga_socrates.h @@ -52,9 +52,6 @@
#define CONFIG_ENV_OFFSET 512 /* just after the MBR */
/* USB */
-#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif
#define CONFIG_G_DNL_MANUFACTURER "EBV"
/* Extra Environment */
With this patch series, I think you should follow up with a patch like below?
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index f74c758..b57fd4c 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -233,13 +233,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #ifdef CONFIG_CMD_USB #define CONFIG_USB_DWC2 #define CONFIG_USB_STORAGE -/*
- NOTE: User must define either of the following to select which
of the two USB controllers available on SoCFPGA to use.
The DWC2 driver doesn't support multiple USB controllers.
- #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB0_ADDRESS
- #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS
- */
#endif
You're right. Can you give me a SoB line on this or submit one ?
I'll submit a patch for you.
Dinh

On Monday, December 07, 2015 at 11:49:47 PM, Dinh Nguyen wrote:
On Mon, Dec 7, 2015 at 4:01 PM, Marek Vasut marex@denx.de wrote:
On Monday, December 07, 2015 at 10:49:09 PM, Dinh Nguyen wrote:
On 12/05/2015 02:43 PM, Marek Vasut wrote:
This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled.
Signed-off-by: Marek Vasut marex@denx.de Cc: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Lukasz Majewski l.majewski@majess.pl Cc: Lukasz Majewski l.majewski@samsung.com
arch/arm/dts/socfpga_cyclone5_socrates.dts | 8 ++++++++ board/ebv/socrates/socfpga.c | 21 +++++++++++++++++++-- configs/socfpga_socrates_defconfig | 2 ++ include/configs/socfpga_socrates.h | 3 --- 4 files changed, 29 insertions(+), 5 deletions(-)
<snip>
diff --git a/include/configs/socfpga_socrates.h b/include/configs/socfpga_socrates.h index de8ced6..1b0888f 100644 --- a/include/configs/socfpga_socrates.h +++ b/include/configs/socfpga_socrates.h @@ -52,9 +52,6 @@
#define CONFIG_ENV_OFFSET 512 /* just after the MBR */
/* USB */
-#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS -#endif
#define CONFIG_G_DNL_MANUFACTURER "EBV"
/* Extra Environment */
With this patch series, I think you should follow up with a patch like below?
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index f74c758..b57fd4c 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -233,13 +233,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
#ifdef CONFIG_CMD_USB #define CONFIG_USB_DWC2 #define CONFIG_USB_STORAGE
-/*
- NOTE: User must define either of the following to select which
of the two USB controllers available on SoCFPGA to use.
The DWC2 driver doesn't support multiple USB controllers.
- #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB0_ADDRESS
- #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS
- */
#endif
You're right. Can you give me a SoB line on this or submit one ?
I'll submit a patch for you.
Thanks!
I am completely happy that we're finally reaching the point where we just don't need any of the board-specific crap.
My next step I think would be to revisit the configuration files in include/configs/socfpga_* and possibly do some more unification of those into include/configs/socfpga_common.h .

On Sat, 2015-12-05 at 21:43 +0100, Marek Vasut wrote:
The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it.
Signed-off-by: Marek Vasut marex@denx.de Cc: Simon Glass sjg@chromium.org Cc: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Lukasz Majewski l.majewski@majess.pl Cc: Lukasz Majewski l.majewski@samsung.com
include/fdtdec.h | 1 + lib/fdtdec.c | 1 + 2 files changed, 2 insertions(+)
Reviewed-by: Chin Liang See clsee@altera.com
Thanks Chin Liang

On 7 December 2015 at 05:29, Chin Liang See clsee@altera.com wrote:
On Sat, 2015-12-05 at 21:43 +0100, Marek Vasut wrote:
The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it.
Signed-off-by: Marek Vasut marex@denx.de Cc: Simon Glass sjg@chromium.org Cc: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Lukasz Majewski l.majewski@majess.pl Cc: Lukasz Majewski l.majewski@samsung.com
include/fdtdec.h | 1 + lib/fdtdec.c | 1 + 2 files changed, 2 insertions(+)
Reviewed-by: Chin Liang See clsee@altera.com
Reviewed-by: Simon Glass sjg@chromium.org
participants (5)
-
Chin Liang See
-
Dinh Nguyen
-
Dinh Nguyen
-
Marek Vasut
-
Simon Glass