[U-Boot] [PATCH] da850: add NOR boot mode support
From: Nagabhushana Netagunte nagabhushana.netagunte@ti.com
Add an option to use NOR boot mode in configuration file and correspanding pin-mux support in board file.
Signed-off-by: Sudhakar Rajashekhara sudhakar.raj@ti.com Signed-off-by: Nagabhushana Netagunte nagabhushana.netagunte@ti.com --- board/davinci/da8xxevm/da850evm.c | 50 +++++++++++++++++++++++++++++++++++++ include/configs/da850evm.h | 21 ++++++++++++++- 2 files changed, 70 insertions(+), 1 deletions(-)
diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index 73eaa48..a77e438 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -105,6 +105,54 @@ const struct pinmux_config nand_pins[] = { { pinmux(12), 1, 5 }, { pinmux(12), 1, 6 } }; +#elif defined(CONFIG_SYS_USE_NOR) +const struct pinmux_config nor_pins[] = { + { pinmux(5), 1, 6 }, + { pinmux(6), 1, 6 }, + { pinmux(7), 1, 0 }, + { pinmux(7), 1, 4 }, + { pinmux(7), 1, 5 }, + { pinmux(8), 1, 0 }, + { pinmux(8), 1, 1 }, + { pinmux(8), 1, 2 }, + { pinmux(8), 1, 3 }, + { pinmux(8), 1, 4 }, + { pinmux(8), 1, 5 }, + { pinmux(8), 1, 6 }, + { pinmux(8), 1, 7 }, + { pinmux(9), 1, 0 }, + { pinmux(9), 1, 1 }, + { pinmux(9), 1, 2 }, + { pinmux(9), 1, 3 }, + { pinmux(9), 1, 4 }, + { pinmux(9), 1, 5 }, + { pinmux(9), 1, 6 }, + { pinmux(9), 1, 7 }, + { pinmux(10), 1, 0 }, + { pinmux(10), 1, 1 }, + { pinmux(10), 1, 2 }, + { pinmux(10), 1, 3 }, + { pinmux(10), 1, 4 }, + { pinmux(10), 1, 5 }, + { pinmux(10), 1, 6 }, + { pinmux(10), 1, 7 }, + { pinmux(11), 1, 0 }, + { pinmux(11), 1, 1 }, + { pinmux(11), 1, 2 }, + { pinmux(11), 1, 3 }, + { pinmux(11), 1, 4 }, + { pinmux(11), 1, 5 }, + { pinmux(11), 1, 6 }, + { pinmux(11), 1, 7 }, + { pinmux(12), 1, 0 }, + { pinmux(12), 1, 1 }, + { pinmux(12), 1, 2 }, + { pinmux(12), 1, 3 }, + { pinmux(12), 1, 4 }, + { pinmux(12), 1, 5 }, + { pinmux(12), 1, 6 }, + { pinmux(12), 1, 7 } +}; #endif
#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII @@ -122,6 +170,8 @@ static const struct pinmux_resource pinmuxes[] = { PINMUX_ITEM(i2c_pins), #ifdef CONFIG_NAND_DAVINCI PINMUX_ITEM(nand_pins), +#elif defined(CONFIG_USE_NOR) + PINMUX_ITEM(nor_pins), #endif };
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index fdcc6e3..f0015e4 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -28,6 +28,8 @@ */ #define CONFIG_DRIVER_TI_EMAC #define CONFIG_USE_SPIFLASH +#undef CONFIG_USE_NAND +#undef CONFIG_SYS_USE_NOR
/* * SoC Configuration @@ -129,6 +131,23 @@ #define CONFIG_NET_MULTI #endif
+#ifdef CONFIG_SYS_USE_NOR +#define CONFIG_ENV_IS_IN_FLASH +#undef CONFIG_SYS_NO_FLASH +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ +#define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */ +#define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ * 3) +#define CONFIG_ENV_SIZE (128 << 10) +#define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE +#define PHYS_FLASH_SIZE (8 << 20) /* Flash size 8MB */ +#define CONFIG_SYS_MAX_FLASH_SECT ((PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ)\ + + 3) +#define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ +#endif + #ifdef CONFIG_USE_SPIFLASH #undef CONFIG_ENV_IS_IN_FLASH #undef CONFIG_ENV_IS_IN_NAND @@ -212,7 +231,7 @@ #endif
#if !defined(CONFIG_USE_NAND) && \ - !defined(CONFIG_USE_NOR) && \ + !defined(CONFIG_SYS_USE_NOR) && \ !defined(CONFIG_USE_SPIFLASH) #define CONFIG_ENV_IS_NOWHERE #define CONFIG_SYS_NO_FLASH
From: Nagabhushana Netagunte nagabhushana.netagunte@ti.com
add support for cache management in config file. This is needed as per new cache management framework. da850 doesnt support I-CACHE, D-CACHE or L2-CACHE usage which is indicated by following definitions,
1. CONFIG_SYS_ICACHE_OFF 2. CONFIG_SYS_DCACHE_OFF 3. CONFIG_SYS_L2CACHE_OFF
Signed-off-by: Sudhakar Rajashekhara sudhakar.raj@ti.com Signed-off-by: Nagabhushana Netagunte nagabhushana.netagunte@ti.com --- include/configs/da850evm.h | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index bbb5a9b..fdcc6e3 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -42,6 +42,9 @@ #define CONFIG_SYS_HZ 1000 #define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SYS_TEXT_BASE 0xc1080000 +#define CONFIG_SYS_ICACHE_OFF +#define CONFIG_SYS_DCACHE_OFF +#define CONFIG_SYS_L2CACHE_OFF
/* * Memory Info
Hi,
From: Nagabhushana Netagunte nagabhushana.netagunte@ti.com
add support for cache management in config file. This is needed as per new cache management framework. da850 doesnt support I-CACHE, D-CACHE or L2-CACHE usage which is indicated by following definitions,
- CONFIG_SYS_ICACHE_OFF
- CONFIG_SYS_DCACHE_OFF
- CONFIG_SYS_L2CACHE_OFF
This commit message makes no sense for me. You "add support" for something which essentially is "not supported" as you say. If you are trying to fix compile problems, then please say so.
Cheers Detlev
Detlev, Thanks for your comments, I will make appropriate changes to 'commit' message. -Nag On Fri, Jul 29, 2011 at 13:56:32, Detlev Zundel wrote:
Hi,
From: Nagabhushana Netagunte nagabhushana.netagunte@ti.com
add support for cache management in config file. This is needed as per new cache management framework. da850 doesnt support I-CACHE, D-CACHE or L2-CACHE usage which is indicated by following definitions,
- CONFIG_SYS_ICACHE_OFF
- CONFIG_SYS_DCACHE_OFF
- CONFIG_SYS_L2CACHE_OFF
This commit message makes no sense for me. You "add support" for something which essentially is "not supported" as you say. If you are trying to fix compile problems, then please say so.
Cheers Detlev
-- ... that every year or so they're going to give you a new release full of 50 000 additional lines of code all written by monkeys. Because they generally follow the ``million monkeys typing, and eventually they'll come up with something useful'' school of system development. -- Richard M. Stallman -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: dzu@denx.de
From: Nagabhushana Netagunte nagabhushana.netagunte@ti.com
Add provision to enable RMII support in configuration file.
Signed-off-by: Sudhakar Rajashekhara sudhakar.raj@ti.com Signed-off-by: Nagabhushana Netagunte nagabhushana.netagunte@ti.com --- include/configs/da850evm.h | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index f7bf6be..92bab82 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -123,6 +123,7 @@ #ifdef CONFIG_DRIVER_TI_EMAC #define CONFIG_EMAC_MDIO_PHY_NUM 0 #define CONFIG_MII +#undef CONFIG_DRIVER_TI_EMAC_USE_RMII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2
Hi,
From: Nagabhushana Netagunte nagabhushana.netagunte@ti.com
Add provision to enable RMII support in configuration file.
What is that supposed to mean? You are actually adding an "undef", so nothing changes. What are you trying to achieve?
Signed-off-by: Sudhakar Rajashekhara sudhakar.raj@ti.com Signed-off-by: Nagabhushana Netagunte nagabhushana.netagunte@ti.com
include/configs/da850evm.h | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index f7bf6be..92bab82 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -123,6 +123,7 @@ #ifdef CONFIG_DRIVER_TI_EMAC #define CONFIG_EMAC_MDIO_PHY_NUM 0 #define CONFIG_MII +#undef CONFIG_DRIVER_TI_EMAC_USE_RMII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2
Cheers Detlev
Hi Detlev, Thanks for your comments. I will remove this patch as this patch doesn't make sense. -Nag On Fri, Jul 29, 2011 at 14:01:16, Detlev Zundel wrote:
Hi,
From: Nagabhushana Netagunte nagabhushana.netagunte@ti.com
Add provision to enable RMII support in configuration file.
What is that supposed to mean? You are actually adding an "undef", so nothing changes. What are you trying to achieve?
Signed-off-by: Sudhakar Rajashekhara sudhakar.raj@ti.com Signed-off-by: Nagabhushana Netagunte nagabhushana.netagunte@ti.com
include/configs/da850evm.h | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index f7bf6be..92bab82 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -123,6 +123,7 @@ #ifdef CONFIG_DRIVER_TI_EMAC #define CONFIG_EMAC_MDIO_PHY_NUM 0 #define CONFIG_MII +#undef CONFIG_DRIVER_TI_EMAC_USE_RMII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS #define CONFIG_BOOTP_DNS2
Cheers Detlev
-- Ich hoffe, Sie verzeihen mir meine Leidenschaft. Ich hätte Ihnen Ihre auch gerne verziehen. -- Dieter Hildebrandt -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: dzu@denx.de
From: Manjunathappa, Prakash prakash.pm@ti.com
The AM18xx EVM contains winbond SPI flash instead of ST SPI flash in comparison with logic PD da850/omap-l138 EVM. So enable configuration to look for winbond flash.
Signed-off-by: Manjunathappa, Prakash prakash.pm@ti.com Signed-off-by: Nagabhushana Netagunte nagabhushana.netagunte@ti.com --- include/configs/da850evm.h | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 92bab82..2a61e06 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -80,6 +80,7 @@ #define CONFIG_SPI #define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SPI_FLASH_WINBOND #define CONFIG_DAVINCI_SPI #define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID)
From: Nagabhushana Netagunte nagabhushana.netagunte@ti.com
add misc_int_r function to read the mac address from SPI flash if env variable ethaddr is not set.
Signed-off-by: Prakash PM prakash.pm@ti.com Signed-off-by: Nagabhushana Netagunte nagabhushana.netagunte@ti.com --- board/davinci/da8xxevm/da850evm.c | 65 +++++++++++++++++++++++++++++++++++++ include/configs/da850evm.h | 1 + 2 files changed, 66 insertions(+), 0 deletions(-)
diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index a77e438..8d09bb9 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -25,10 +25,13 @@ #include <i2c.h> #include <net.h> #include <netdev.h> +#include <spi.h> +#include <spi_flash.h> #include <asm/arch/hardware.h> #include <asm/arch/emif_defs.h> #include <asm/arch/emac_defs.h> #include <asm/io.h> +#include <asm/errno.h> #include <asm/arch/davinci_misc.h>
DECLARE_GLOBAL_DATA_PTR; @@ -383,4 +386,66 @@ int board_eth_init(bd_t *bis)
return 0; } + #endif /* CONFIG_DRIVER_TI_EMAC */ + +#define CFG_MAC_ADDR_SPI_BUS 0 +#define CFG_MAC_ADDR_SPI_CS 0 +#define CFG_MAC_ADDR_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#define CFG_MAC_ADDR_SPI_MODE SPI_MODE_3 + +#define CFG_MAC_ADDR_OFFSET (flash->size - SZ_64K) + +static int get_mac_addr(u8 *addr) +{ + int ret; + struct spi_flash *flash; + + flash = spi_flash_probe(CFG_MAC_ADDR_SPI_BUS, CFG_MAC_ADDR_SPI_CS, + CFG_MAC_ADDR_SPI_MAX_HZ, CFG_MAC_ADDR_SPI_MODE); + if (!flash) { + printf(" Error - unable to probe SPI flash.\n"); + ret = -1; + goto err_probe; + } + + ret = spi_flash_read(flash, CFG_MAC_ADDR_OFFSET, 6, addr); + if (ret) { + printf("Error - unable to read MAC address from SPI flash.\n"); + goto err_read; + } + +err_read: + /* cannot call free currently since the free function calls free() for + * spi_flash structure though it is not directly allocated through + * malloc() + */ +err_probe: + return ret; +} + +int misc_init_r(void) +{ + uint8_t tmp[20], addr[10]; + int ret; + + printf("ARM Clock : %d Hz\n", clk_get(DAVINCI_ARM_CLKID)); + + if (getenv("ethaddr") == NULL) { + /* Set Ethernet MAC address from EEPROM */ + ret = get_mac_addr(addr); + if (ret != 0) + return -EINVAL; + + if (is_multicast_ether_addr(addr) || is_zero_ether_addr(addr)) { + printf("Invalid MAC address read.\n"); + return -EINVAL; + } + sprintf((char *)tmp, "%02x:%02x:%02x:%02x:%02x:%02x", addr[0], + addr[1], addr[2], addr[3], addr[4], addr[5]); + + setenv("ethaddr", (char *)tmp); + } + + return 0; +} diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 21d8fe3..f7bf6be 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -161,6 +161,7 @@ /* * U-Boot general configuration */ +#define CONFIG_MISC_INIT_R #define CONFIG_BOOTFILE "uImage" /* Boot file name */ #define CONFIG_SYS_PROMPT "U-Boot > " /* Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
From: Nagabhushana Netagunte nagabhushana.netagunte@ti.com
Add support for DSP wake-up by default on DA850/OMAP-L138 during board initialization. To prevent DSP from being woken up, set the environment variable dspwake to 'no'.
Signed-off-by: Sekhar Nori nsekhar@ti.com Signed-off-by: Nagabhushana Netagunte nagabhushana.netagunte@ti.com --- arch/arm/include/asm/arch-davinci/hardware.h | 5 +++ board/davinci/da8xxevm/da850evm.c | 51 ++++++++++++++++++++++++++ 2 files changed, 56 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h index d2b2989..c41d756 100644 --- a/arch/arm/include/asm/arch-davinci/hardware.h +++ b/arch/arm/include/asm/arch-davinci/hardware.h @@ -151,7 +151,12 @@ typedef volatile unsigned int * dv_reg_p; #define DAVINCI_DDR_EMIF_DATA_BASE 0xc0000000 #define DAVINCI_INTC_BASE 0xfffee000 #define DAVINCI_BOOTCFG_BASE 0x01c14000 +#define DAVINCI_L3CBARAM_BASE 0x80000000 #define JTAG_ID_REG (DAVINCI_BOOTCFG_BASE + 0x18) +#define CHIP_REV_ID_REG (DAVINCI_BOOTCFG_BASE + 0x24) +#define HOST1CFG (DAVINCI_BOOTCFG_BASE + 0x44) +#define PSC0_MDCTL (DAVINCI_PSC0_BASE + 0xa00) +
#define GPIO_BANK2_REG_DIR_ADDR (DAVINCI_GPIO_BASE + 0x38) #define GPIO_BANK2_REG_OPDATA_ADDR (DAVINCI_GPIO_BASE + 0x3c) diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index 8d09bb9..f7754fe 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -424,6 +424,55 @@ err_probe: return ret; }
+void dsp_lpsc_on(unsigned domain, unsigned int id) +{ + dv_reg_p mdstat, mdctl, ptstat, ptcmd; + struct davinci_psc_regs *psc_regs; + + psc_regs = davinci_psc0_regs; + mdstat = &psc_regs->psc0.mdstat[id]; + mdctl = &psc_regs->psc0.mdctl[id]; + ptstat = &psc_regs->ptstat; + ptcmd = &psc_regs->ptcmd; + + while (*ptstat & (0x1 << domain)) + ; + + if ((*mdstat & 0x1f) == 0x03) + return; /* Already on and enabled */ + + *mdctl |= 0x03; + + *ptcmd = 0x1 << domain; + + while (*ptstat & (0x1 << domain)) + ; + while ((*mdstat & 0x1f) != 0x03) + ; /* Probably an overkill... */ +} + +static void dspwake(void) +{ + unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE; + + /* if the device is ARM only, return */ + if ((REG(CHIP_REV_ID_REG) & 0x3f) == 0x10) + return; + + if (!strcmp(getenv("dspwake"), "no")) + return; + + *resetvect++ = 0x1E000; /* DSP Idle */ + /* clear out the next 10 words as NOP */ + memset(resetvect, 0, sizeof(unsigned) * 10); + + /* setup the DSP reset vector */ + REG(HOST1CFG) = DAVINCI_L3CBARAM_BASE; + + dsp_lpsc_on(1, DAVINCI_LPSC_GEM); + REG(PSC0_MDCTL + (15 * 4)) |= 0x100; +} + int misc_init_r(void) { uint8_t tmp[20], addr[10]; @@ -447,5 +496,7 @@ int misc_init_r(void) setenv("ethaddr", (char *)tmp); }
+ dspwake(); + return 0; }
From: Nagabhushana Netagunte nagabhushana.netagunte@ti.com
TX and RX channel numbers programmed as '1' during EMAC teardown initialization is wrong. This patch fixes the same by setting channel number to '0' which is used by U-boot.
Signed-off-by: Sugumar Natarajan sugumar@ti.com Signed-off-by: Nagabhushana Netagunte nagabhushana.netagunte@ti.com --- drivers/net/davinci_emac.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c index 66c0d13..c0b8929 100644 --- a/drivers/net/davinci_emac.c +++ b/drivers/net/davinci_emac.c @@ -457,7 +457,7 @@ static void davinci_eth_ch_teardown(int ch)
if (ch == EMAC_CH_TX) { /* Init TX channel teardown */ - writel(1, &adap_emac->TXTEARDOWN); + writel(0, &adap_emac->TXTEARDOWN); do { /* * Wait here for Tx teardown completion interrupt to @@ -476,7 +476,7 @@ static void davinci_eth_ch_teardown(int ch) writel(0, &adap_emac->TX0HDP); } else { /* Init RX channel teardown */ - writel(1, &adap_emac->RXTEARDOWN); + writel(0, &adap_emac->RXTEARDOWN); do { /* * Wait here for Rx teardown completion interrupt to
Dear nagabhushana.netagunte@ti.com,
In message 1311870338-18950-7-git-send-email-nagabhushana.netagunte@ti.com you wrote:
From: Nagabhushana Netagunte nagabhushana.netagunte@ti.com
TX and RX channel numbers programmed as '1' during EMAC teardown initialization is wrong. This patch fixes the same by setting channel number to '0' which is used by U-boot.
Is this set of patches in any specific order? It appaers so, as it seems I cannot apply them in random order.
But then, you don't provide any numbering in the Subject: or elsewhere, so how should we know?
NAK for the whole set of patches. Please resubmit with proper numbering.
Best regards,
Wolfgang Denk
Thanks Denk for the comments.
Even though all the patches are separate w.r.t features, they have inter-dependency w.r.t applying. To make it easy for applying, I will send it as Single series with a cover letter as they are all related to da850. I hope That is OK with you.
Thanks, Nagabhushana
On Fri, Jul 29, 2011 at 00:12:12, Wolfgang Denk wrote:
Dear nagabhushana.netagunte@ti.com,
In message 1311870338-18950-7-git-send-email-nagabhushana.netagunte@ti.com you wrote:
From: Nagabhushana Netagunte nagabhushana.netagunte@ti.com
TX and RX channel numbers programmed as '1' during EMAC teardown initialization is wrong. This patch fixes the same by setting channel number to '0' which is used by U-boot.
Is this set of patches in any specific order? It appaers so, as it seems I cannot apply them in random order.
But then, you don't provide any numbering in the Subject: or elsewhere, so how should we know?
NAK for the whole set of patches. Please resubmit with proper numbering.
Best regards,
Wolfgang Denk
-- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de As in certain cults it is possible to kill a process if you know its true name. -- Ken Thompson and Dennis M. Ritchie
From: Nagabhushana Netagunte nagabhushana.netagunte@ti.com
AHCLKR/UART1_RTS/GP0[11] pin needs to be configured for NOR to work on Rev.3 EVM. When GP0[11] is low, the SD0 interface will not work, but NOR flash will.
Signed-off-by: Rajashekhara, Sudhakar sudhakar.raj@ti.com Signed-off-by: Nagabhushana Netagunte nagabhushana.netagunte@ti.com --- arch/arm/include/asm/arch-davinci/hardware.h | 5 ++++- board/davinci/da8xxevm/da850evm.c | 15 +++++++++++++++ 2 files changed, 19 insertions(+), 1 deletions(-)
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h index c41d756..3d6cb88 100644 --- a/arch/arm/include/asm/arch-davinci/hardware.h +++ b/arch/arm/include/asm/arch-davinci/hardware.h @@ -157,7 +157,10 @@ typedef volatile unsigned int * dv_reg_p; #define HOST1CFG (DAVINCI_BOOTCFG_BASE + 0x44) #define PSC0_MDCTL (DAVINCI_PSC0_BASE + 0xa00)
- +#define GPIO_BANK0_REG_DIR_ADDR (DAVINCI_GPIO_BASE + 0x10) +#define GPIO_BANK0_REG_OPDATA_ADDR (DAVINCI_GPIO_BASE + 0x14) +#define GPIO_BANK0_REG_SET_ADDR (DAVINCI_GPIO_BASE + 0x18) +#define GPIO_BANK0_REG_CLR_ADDR (DAVINCI_GPIO_BASE + 0x1c) #define GPIO_BANK2_REG_DIR_ADDR (DAVINCI_GPIO_BASE + 0x38) #define GPIO_BANK2_REG_OPDATA_ADDR (DAVINCI_GPIO_BASE + 0x3c) #define GPIO_BANK2_REG_SET_ADDR (DAVINCI_GPIO_BASE + 0x40) diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index fd05703..a077368 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -110,6 +110,8 @@ const struct pinmux_config nand_pins[] = { }; #elif defined(CONFIG_SYS_USE_NOR) const struct pinmux_config nor_pins[] = { + /* GP0[11] is required for SD to work on Rev 3 EVMs */ + { pinmux(0), 8, 4 }, /* GP0[11] */ { pinmux(5), 1, 6 }, { pinmux(6), 1, 6 }, { pinmux(7), 1, 0 }, @@ -229,6 +231,7 @@ u32 get_board_rev(void)
int board_init(void) { + unsigned int val; #ifndef CONFIG_USE_IRQ irq_init(); #endif @@ -276,6 +279,18 @@ int board_init(void) if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes))) return 1;
+#ifdef CONFIG_SYS_USE_NOR + /* Set the GPIO direction as output */ + val = REG(GPIO_BANK0_REG_DIR_ADDR); + val &= ~(0x01 << 11); + REG(GPIO_BANK0_REG_DIR_ADDR) = val; + + /* Set the output as low */ + val = REG(GPIO_BANK0_REG_SET_ADDR); + val |= (0x01 << 11); + REG(GPIO_BANK0_REG_CLR_ADDR) = val; +#endif + #ifdef CONFIG_DRIVER_TI_EMAC if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0) return 1;
From: Nagabhushana Netagunte nagabhushana.netagunte@ti.com
Starting from kernel 2.6.24 'rootwait' can be used to wait for the rootdevice to become ready, this is preferred over choosing a random delay.
In the case of da8xx/omap-l1xx the delay is dependant on the MMC card present and can take more than 10 seconds in some cases.
Signed-off-by: Sudhakar Rajashekhara sudhakar.raj@ti.com Signed-off-by: Nagabhushana Netagunte nagabhushana.netagunte@ti.com --- include/configs/da850evm.h | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 70d250e..21d8fe3 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -185,7 +185,9 @@ #define CONFIG_REVISION_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_BOOTARGS \ - "mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp" + "mem=32M console=ttyS2,115200n8 root=/dev/mmcblk0p1 rw rootwait ip=off" +#define CONFIG_BOOTCMD \ + "sf probe 0;sf read 0xc0700000 0x80000 0x220000;bootm 0xc0700000" #define CONFIG_BOOTDELAY 3
/*
From: Nagabhushana Netagunte nagabhushana.netagunte@ti.com
Modify U-Boot prompt string from "DA850-evm >" to "U-Boot >".
Signed-off-by: Sudhakar Rajashekhara sudhakar.raj@ti.com Signed-off-by: Nagabhushana Netagunte nagabhushana.netagunte@ti.com --- include/configs/da850evm.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index f0015e4..70d250e 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -162,7 +162,7 @@ * U-Boot general configuration */ #define CONFIG_BOOTFILE "uImage" /* Boot file name */ -#define CONFIG_SYS_PROMPT "DA850-evm > " /* Command Prompt */ +#define CONFIG_SYS_PROMPT "U-Boot > " /* Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
From: Manjunathappa, Prakash prakash.pm@ti.com
The Spectrum Digital AM18xx EVM contains I2C EEPROM compared da850/omap-l138 Logic PD EVMs. This information is used to differentiate the EVMs and is passed to kernel via second byte of ATAG_REVISION.
Signed-off-by: Manjunathappa, Prakash prakash.pm@ti.com Signed-off-by: Nagabhushana Netagunte nagabhushana.netagunte@ti.com --- board/davinci/da8xxevm/da850evm.c | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index f7754fe..d99f1a0 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -216,6 +216,14 @@ u32 get_board_rev(void) else if (maxcpuclk >= 372000000) rev = 1;
+ /* Spectrum Digital AM18xx EVM contains I2C EEPROM compared + da850/omap-l138 Logic PD EVMs. This information is used to + differentiate the EVMs and is passed to kernel via second + byte of ATAG_REVISION. */ + + if (i2c_probe(0x50) == 0) + rev |= 0x100; + return rev; }
From: Nagabhushana Netagunte nagabhushana.netagunte@ti.com
Print DDR frequency when u-boot is coming up. Function is added in hardware.h to find which PLL clock used.
Signed-off-by: Rajashekhara, Sudhakar sudhakar.raj@ti.com Signed-off-by: Nagabhushana Netagunte nagabhushana.netagunte@ti.com --- arch/arm/include/asm/arch-davinci/hardware.h | 12 ++++++++++++ board/davinci/da8xxevm/da850evm.c | 1 + 2 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h index 3d6cb88..514b359 100644 --- a/arch/arm/include/asm/arch-davinci/hardware.h +++ b/arch/arm/include/asm/arch-davinci/hardware.h @@ -380,8 +380,14 @@ struct davinci_pllc_regs { #define DAVINCI_PLLC_DIV_MASK 0x1f
#define ASYNC3 get_async3_src() +#define EMIFB get_emifb_src() + +#define PLL1_PLLM ((1 << 16) | DAVINCI_PLLM_CLKID) +#define PLL1_SYSCLK1 ((1 << 16) | 0x1) #define PLL1_SYSCLK2 ((1 << 16) | 0x2) #define DAVINCI_SPI1_CLKID (cpu_is_da830() ? 2 : ASYNC3) +#define DAVINCI_DDR_CLKID EMIFB + /* Clock IDs */ enum davinci_clk_ids { DAVINCI_SPI0_CLKID = 2, @@ -485,6 +491,12 @@ static inline int get_async3_src(void) PLL1_SYSCLK2 : 2; }
+static inline int get_emifb_src(void) +{ + return (REG(&davinci_syscfg_regs->cfgchip3) & 0x80) ? + PLL1_PLLM : PLL1_SYSCLK1; +} + #endif /* CONFIG_SOC_DA8XX */
#endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index a077368..55c5a22 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -502,6 +502,7 @@ int misc_init_r(void) int ret;
printf("ARM Clock : %d Hz\n", clk_get(DAVINCI_ARM_CLKID)); + printf("DDR Clock : %d Hz\n", clk_get(DAVINCI_DDR_CLKID)/2);
if (getenv("ethaddr") == NULL) { /* Read Ethernet MAC address from EEPROM */
From: Nagabhushana Netagunte nagabhushana.netagunte@ti.com
The AM18xx EVM contains MAC address in I2C EEPROM compared da850/omap-l138 Logic PD EVM which maintains in SPI flash. So this patch tries to read MAC address from I2C EEPROM, in failure case reads from SPI flash assuming board to be da850/omap-l138 Logic PDS EVM.
Signed-off-by: Manjunathappa, Prakash prakash.pm@ti.com Signed-off-by: Nagabhushana Netagunte nagabhushana.netagunte@ti.com --- board/davinci/da8xxevm/da850evm.c | 14 ++++++++++---- 1 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index d99f1a0..fd05703 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -489,10 +489,16 @@ int misc_init_r(void) printf("ARM Clock : %d Hz\n", clk_get(DAVINCI_ARM_CLKID));
if (getenv("ethaddr") == NULL) { - /* Set Ethernet MAC address from EEPROM */ - ret = get_mac_addr(addr); - if (ret != 0) - return -EINVAL; + /* Read Ethernet MAC address from EEPROM */ + if (dvevm_read_mac_address(addr)) { + /* Set Ethernet MAC address from EEPROM */ + davinci_sync_env_enetaddr(addr); + } else { + /* Set Ethernet MAC address from SPI flash */ + ret = get_mac_addr(addr); + if (ret != 0) + return -EINVAL; + }
if (is_multicast_ether_addr(addr) || is_zero_ether_addr(addr)) { printf("Invalid MAC address read.\n");
On Thu, Jul 28, 2011 at 09:25, <nagabhushana.netagunte@wrote:
if (getenv("ethaddr") == NULL) {
this should get fixed to use the eth helper instead of poking the env yourself. see board/bf537-stamp/bf537-stamp.c as an example. -mike
On Thu, Jul 28, 2011 at 11:31, Mike Frysinger wrote:
On Thu, Jul 28, 2011 at 09:25, <nagabhushana.netagunte@wrote:
if (getenv("ethaddr") == NULL) {
this should get fixed to use the eth helper instead of poking the env yourself. see board/bf537-stamp/bf537-stamp.c as an example.
actually, it looks like this patch is simply a fix for another patch you just sent out. please dont post buggy patches ... just squash the two together.
also, if you're posting patch series, you need to have [#/#] markers in the summary so that people can clearly see the order required for merging. -mike
Hi Mike, Thanks for your comments.
Since the earlier patch is about reading env variable value in SPI flash and This patch concentrates on reading the same from I2C EEPROM, it will be better to have 2 different patches. Second patch is not to fix the first patch.
If you want them to sent after squashing, I can do that as well.
Regards, Nag
On Sat, Jul 30, 2011 at 00:02:41, Mike Frysinger wrote:
On Thu, Jul 28, 2011 at 11:31, Mike Frysinger wrote:
On Thu, Jul 28, 2011 at 09:25, <nagabhushana.netagunte@wrote:
if (getenv("ethaddr") == NULL) {
this should get fixed to use the eth helper instead of poking the env yourself. see board/bf537-stamp/bf537-stamp.c as an example.
actually, it looks like this patch is simply a fix for another patch you just sent out. please dont post buggy patches ... just squash the two together.
also, if you're posting patch series, you need to have [#/#] markers in the summary so that people can clearly see the order required for merging. -mike
Mike, Thanks for your valuable comments; I will use the helper function you suggested.
-Nag On Fri, Jul 29, 2011 at 00:01:39, Mike Frysinger wrote:
On Thu, Jul 28, 2011 at 09:25, <nagabhushana.netagunte@wrote:
if (getenv("ethaddr") == NULL) {
this should get fixed to use the eth helper instead of poking the env yourself. see board/bf537-stamp/bf537-stamp.c as an example. -mike
From: Sudhakar Rajashekhara sudhakar.raj@ti.com
Add support for multiple PLL controllers and in the process, modify the clk_get() to work for multiple PLL controllers.
Signed-off-by: Sudhakar Rajashekhara sudhakar.raj@ti.com Signed-off-by: Nagabhushana Netagunte nagabhushana.netagunte@ti.com --- arch/arm/cpu/arm926ejs/davinci/cpu.c | 27 +++++++++++++++---------- arch/arm/include/asm/arch-davinci/hardware.h | 1 + 2 files changed, 17 insertions(+), 11 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/davinci/cpu.c b/arch/arm/cpu/arm926ejs/davinci/cpu.c index 8b57205..3ab56c7 100644 --- a/arch/arm/cpu/arm926ejs/davinci/cpu.c +++ b/arch/arm/cpu/arm926ejs/davinci/cpu.c @@ -37,6 +37,7 @@ #define PLLC_PLLDIV4 0x160 #define PLLC_PLLDIV5 0x164 #define PLLC_PLLDIV6 0x168 +#define PLLC_PLLDIV7 0x16c #define PLLC_PLLDIV8 0x170 #define PLLC_PLLDIV9 0x174
@@ -61,11 +62,9 @@ #endif
#ifdef CONFIG_SOC_DA8XX -const dv_reg * const sysdiv[7] = { - &davinci_pllc_regs->plldiv1, &davinci_pllc_regs->plldiv2, - &davinci_pllc_regs->plldiv3, &davinci_pllc_regs->plldiv4, - &davinci_pllc_regs->plldiv5, &davinci_pllc_regs->plldiv6, - &davinci_pllc_regs->plldiv7 +unsigned int sysdiv[9] = { + PLLC_PLLDIV1, PLLC_PLLDIV2, PLLC_PLLDIV3, PLLC_PLLDIV4, PLLC_PLLDIV5, + PLLC_PLLDIV6, PLLC_PLLDIV7, PLLC_PLLDIV8, PLLC_PLLDIV9 };
int clk_get(enum davinci_clk_ids id) @@ -74,19 +73,26 @@ int clk_get(enum davinci_clk_ids id) int pllm; int post_div; int pll_out; + volatile unsigned int pll_base;
pll_out = CONFIG_SYS_OSCIN_FREQ;
if (id == DAVINCI_AUXCLK_CLKID) goto out;
+ if ((id >> 16) == 1) + pll_base = DAVINCI_PLL_CNTRL1_BASE; + else + pll_base = DAVINCI_PLL_CNTRL0_BASE; + + id &= 0xFFFF; + /* * Lets keep this simple. Combining operations can result in * unexpected approximations */ - pre_div = (readl(&davinci_pllc_regs->prediv) & - DAVINCI_PLLC_DIV_MASK) + 1; - pllm = readl(&davinci_pllc_regs->pllm) + 1; + pre_div = (REG(pll_base + PLLC_PREDIV) & 0xff) + 1; + pllm = REG(pll_base + PLLC_PLLM) + 1;
pll_out /= pre_div; pll_out *= pllm; @@ -94,15 +100,14 @@ int clk_get(enum davinci_clk_ids id) if (id == DAVINCI_PLLM_CLKID) goto out;
- post_div = (readl(&davinci_pllc_regs->postdiv) & - DAVINCI_PLLC_DIV_MASK) + 1; + post_div = (REG(pll_base + PLLC_POSTDIV) & 0xff) + 1;
pll_out /= post_div;
if (id == DAVINCI_PLLC_CLKID) goto out;
- pll_out /= (readl(sysdiv[id - 1]) & DAVINCI_PLLC_DIV_MASK) + 1; + pll_out /= (REG(pll_base + sysdiv[id - 1]) & 0xff) + 1;
out: return pll_out; diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h index df3f549..d2b2989 100644 --- a/arch/arm/include/asm/arch-davinci/hardware.h +++ b/arch/arm/include/asm/arch-davinci/hardware.h @@ -129,6 +129,7 @@ typedef volatile unsigned int * dv_reg_p; #define DAVINCI_TIMER1_BASE 0x01c21000 #define DAVINCI_WDOG_BASE 0x01c21000 #define DAVINCI_PLL_CNTRL0_BASE 0x01c11000 +#define DAVINCI_PLL_CNTRL1_BASE 0x01e1a000 #define DAVINCI_PSC0_BASE 0x01c10000 #define DAVINCI_PSC1_BASE 0x01e27000 #define DAVINCI_SPI0_BASE 0x01c41000
Hi,
[...]
- pre_div = (readl(&davinci_pllc_regs->prediv) &
DAVINCI_PLLC_DIV_MASK) + 1;- pllm = readl(&davinci_pllc_regs->pllm) + 1;
- pre_div = (REG(pll_base + PLLC_PREDIV) & 0xff) + 1;
- pllm = REG(pll_base + PLLC_PLLM) + 1;
Nack - do not change "common" accessors into local macros. We should really strive to have a common base here. See also
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/104428
Cheers Detlev
Detlev, Thanks for your comments. I will make appropriate changes to the patch.
-Nag On Fri, Jul 29, 2011 at 14:11:41, Detlev Zundel wrote:
Hi,
[...]
- pre_div = (readl(&davinci_pllc_regs->prediv) &
DAVINCI_PLLC_DIV_MASK) + 1;- pllm = readl(&davinci_pllc_regs->pllm) + 1;
- pre_div = (REG(pll_base + PLLC_PREDIV) & 0xff) + 1;
- pllm = REG(pll_base + PLLC_PLLM) + 1;
Nack - do not change "common" accessors into local macros. We should really strive to have a common base here. See also
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/104428
Cheers Detlev
-- He thinks he's really smooth, but he's only C^1. -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: dzu@denx.de
Hi,
From: Nagabhushana Netagunte nagabhushana.netagunte@ti.com
Add an option to use NOR boot mode in configuration file and correspanding pin-mux support in board file.
Signed-off-by: Sudhakar Rajashekhara sudhakar.raj@ti.com Signed-off-by: Nagabhushana Netagunte nagabhushana.netagunte@ti.com
board/davinci/da8xxevm/da850evm.c | 50 +++++++++++++++++++++++++++++++++++++ include/configs/da850evm.h | 21 ++++++++++++++- 2 files changed, 70 insertions(+), 1 deletions(-)
diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index 73eaa48..a77e438 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -105,6 +105,54 @@ const struct pinmux_config nand_pins[] = { { pinmux(12), 1, 5 }, { pinmux(12), 1, 6 } }; +#elif defined(CONFIG_SYS_USE_NOR)
Can we have at least a little comment explaining what this long magic list does? I for one don't have the slightest clue to why it has to be like this.
+const struct pinmux_config nor_pins[] = {
- { pinmux(5), 1, 6 },
- { pinmux(6), 1, 6 },
- { pinmux(7), 1, 0 },
- { pinmux(7), 1, 4 },
- { pinmux(7), 1, 5 },
- { pinmux(8), 1, 0 },
- { pinmux(8), 1, 1 },
- { pinmux(8), 1, 2 },
- { pinmux(8), 1, 3 },
- { pinmux(8), 1, 4 },
- { pinmux(8), 1, 5 },
- { pinmux(8), 1, 6 },
- { pinmux(8), 1, 7 },
- { pinmux(9), 1, 0 },
- { pinmux(9), 1, 1 },
- { pinmux(9), 1, 2 },
- { pinmux(9), 1, 3 },
- { pinmux(9), 1, 4 },
- { pinmux(9), 1, 5 },
- { pinmux(9), 1, 6 },
- { pinmux(9), 1, 7 },
- { pinmux(10), 1, 0 },
- { pinmux(10), 1, 1 },
- { pinmux(10), 1, 2 },
- { pinmux(10), 1, 3 },
- { pinmux(10), 1, 4 },
- { pinmux(10), 1, 5 },
- { pinmux(10), 1, 6 },
- { pinmux(10), 1, 7 },
- { pinmux(11), 1, 0 },
- { pinmux(11), 1, 1 },
- { pinmux(11), 1, 2 },
- { pinmux(11), 1, 3 },
- { pinmux(11), 1, 4 },
- { pinmux(11), 1, 5 },
- { pinmux(11), 1, 6 },
- { pinmux(11), 1, 7 },
- { pinmux(12), 1, 0 },
- { pinmux(12), 1, 1 },
- { pinmux(12), 1, 2 },
- { pinmux(12), 1, 3 },
- { pinmux(12), 1, 4 },
- { pinmux(12), 1, 5 },
- { pinmux(12), 1, 6 },
- { pinmux(12), 1, 7 }
+}; #endif
#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII @@ -122,6 +170,8 @@ static const struct pinmux_resource pinmuxes[] = { PINMUX_ITEM(i2c_pins), #ifdef CONFIG_NAND_DAVINCI PINMUX_ITEM(nand_pins), +#elif defined(CONFIG_USE_NOR)
- PINMUX_ITEM(nor_pins),
#endif };
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index fdcc6e3..f0015e4 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -28,6 +28,8 @@ */ #define CONFIG_DRIVER_TI_EMAC #define CONFIG_USE_SPIFLASH +#undef CONFIG_USE_NAND +#undef CONFIG_SYS_USE_NOR
/*
- SoC Configuration
@@ -129,6 +131,23 @@ #define CONFIG_NET_MULTI #endif
+#ifdef CONFIG_SYS_USE_NOR +#define CONFIG_ENV_IS_IN_FLASH +#undef CONFIG_SYS_NO_FLASH +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ +#define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */ +#define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ * 3) +#define CONFIG_ENV_SIZE (128 << 10) +#define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE +#define PHYS_FLASH_SIZE (8 << 20) /* Flash size 8MB */ +#define CONFIG_SYS_MAX_FLASH_SECT ((PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ)\
+ 3)+#define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ +#endif
#ifdef CONFIG_USE_SPIFLASH #undef CONFIG_ENV_IS_IN_FLASH #undef CONFIG_ENV_IS_IN_NAND @@ -212,7 +231,7 @@ #endif
#if !defined(CONFIG_USE_NAND) && \
- !defined(CONFIG_USE_NOR) && \
- !defined(CONFIG_SYS_USE_NOR) && \ !defined(CONFIG_USE_SPIFLASH)
#define CONFIG_ENV_IS_NOWHERE #define CONFIG_SYS_NO_FLASH
Also I am somewhat sceptical about the names of the defines in this board config - there is for example the new CONFIG_SYS_USE_NOR and the "old" CONFIG_USE_NAND and CONFIG_USE_SPIFLASH. Looking into the README, I see this:
,----[ README ] | There are two classes of configuration variables: | | * Configuration _OPTIONS_: | These are selectable by the user and have names beginning with | "CONFIG_". | | * Configuration _SETTINGS_: | These depend on the hardware etc. and should not be meddled with if | you don't know what you're doing; they have names beginning with | "CONFIG_SYS_". `----
If the names are chosen correctly, then CONFIG_SYS_USE_NOR is coupled to the actual hardware, so either the hardware _has_ NOR flash, then it must be set, or it _doesn't_ have NOR flash, then we don't set it. But it seems the options are there to give the user a choice what medium he wants to use (for e.g. the environment). So if this is correct, then please strip the _SYS_ in them.
Cheers Detlev
Zundel, Thanks for your valuable comments. My reply inline.
-Nag
On Fri, Jul 29, 2011 at 13:54:30, Detlev Zundel wrote:
Hi,
From: Nagabhushana Netagunte nagabhushana.netagunte@ti.com
Add an option to use NOR boot mode in configuration file and correspanding pin-mux support in board file.
Signed-off-by: Sudhakar Rajashekhara sudhakar.raj@ti.com Signed-off-by: Nagabhushana Netagunte nagabhushana.netagunte@ti.com
board/davinci/da8xxevm/da850evm.c | 50 +++++++++++++++++++++++++++++++++++++ include/configs/da850evm.h | 21 ++++++++++++++- 2 files changed, 70 insertions(+), 1 deletions(-)
diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index 73eaa48..a77e438 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -105,6 +105,54 @@ const struct pinmux_config nand_pins[] = { { pinmux(12), 1, 5 }, { pinmux(12), 1, 6 } }; +#elif defined(CONFIG_SYS_USE_NOR)
Can we have at least a little comment explaining what this long magic list does? I for one don't have the slightest clue to why it has to be like this.
Will add comments.
+const struct pinmux_config nor_pins[] = {
- { pinmux(5), 1, 6 },
- { pinmux(6), 1, 6 },
- { pinmux(7), 1, 0 },
- { pinmux(7), 1, 4 },
- { pinmux(7), 1, 5 },
- { pinmux(8), 1, 0 },
- { pinmux(8), 1, 1 },
- { pinmux(8), 1, 2 },
- { pinmux(8), 1, 3 },
- { pinmux(8), 1, 4 },
- { pinmux(8), 1, 5 },
- { pinmux(8), 1, 6 },
- { pinmux(8), 1, 7 },
- { pinmux(9), 1, 0 },
- { pinmux(9), 1, 1 },
- { pinmux(9), 1, 2 },
- { pinmux(9), 1, 3 },
- { pinmux(9), 1, 4 },
- { pinmux(9), 1, 5 },
- { pinmux(9), 1, 6 },
- { pinmux(9), 1, 7 },
- { pinmux(10), 1, 0 },
- { pinmux(10), 1, 1 },
- { pinmux(10), 1, 2 },
- { pinmux(10), 1, 3 },
- { pinmux(10), 1, 4 },
- { pinmux(10), 1, 5 },
- { pinmux(10), 1, 6 },
- { pinmux(10), 1, 7 },
- { pinmux(11), 1, 0 },
- { pinmux(11), 1, 1 },
- { pinmux(11), 1, 2 },
- { pinmux(11), 1, 3 },
- { pinmux(11), 1, 4 },
- { pinmux(11), 1, 5 },
- { pinmux(11), 1, 6 },
- { pinmux(11), 1, 7 },
- { pinmux(12), 1, 0 },
- { pinmux(12), 1, 1 },
- { pinmux(12), 1, 2 },
- { pinmux(12), 1, 3 },
- { pinmux(12), 1, 4 },
- { pinmux(12), 1, 5 },
- { pinmux(12), 1, 6 },
- { pinmux(12), 1, 7 }
+}; #endif
#ifdef CONFIG_DRIVER_TI_EMAC_USE_RMII @@ -122,6 +170,8 @@ static const struct pinmux_resource pinmuxes[] = { PINMUX_ITEM(i2c_pins), #ifdef CONFIG_NAND_DAVINCI PINMUX_ITEM(nand_pins), +#elif defined(CONFIG_USE_NOR)
- PINMUX_ITEM(nor_pins),
#endif };
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index fdcc6e3..f0015e4 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -28,6 +28,8 @@ */ #define CONFIG_DRIVER_TI_EMAC #define CONFIG_USE_SPIFLASH +#undef CONFIG_USE_NAND +#undef CONFIG_SYS_USE_NOR
/*
- SoC Configuration
@@ -129,6 +131,23 @@ #define CONFIG_NET_MULTI #endif
+#ifdef CONFIG_SYS_USE_NOR +#define CONFIG_ENV_IS_IN_FLASH +#undef CONFIG_SYS_NO_FLASH +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ +#define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */ +#define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ * 3) +#define CONFIG_ENV_SIZE (128 << 10) +#define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE +#define PHYS_FLASH_SIZE (8 << 20) /* Flash size 8MB */ +#define CONFIG_SYS_MAX_FLASH_SECT ((PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ)\
+ 3)+#define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ +#endif
#ifdef CONFIG_USE_SPIFLASH #undef CONFIG_ENV_IS_IN_FLASH #undef CONFIG_ENV_IS_IN_NAND @@ -212,7 +231,7 @@ #endif
#if !defined(CONFIG_USE_NAND) && \
- !defined(CONFIG_USE_NOR) && \
- !defined(CONFIG_SYS_USE_NOR) && \ !defined(CONFIG_USE_SPIFLASH)
#define CONFIG_ENV_IS_NOWHERE #define CONFIG_SYS_NO_FLASH
Also I am somewhat sceptical about the names of the defines in this board config - there is for example the new CONFIG_SYS_USE_NOR and the "old" CONFIG_USE_NAND and CONFIG_USE_SPIFLASH. Looking into the README, I see this:
,----[ README ] | There are two classes of configuration variables: | | * Configuration _OPTIONS_: | These are selectable by the user and have names beginning with | "CONFIG_". | | * Configuration _SETTINGS_: | These depend on the hardware etc. and should not be meddled with if | you don't know what you're doing; they have names beginning with | "CONFIG_SYS_". `----
If the names are chosen correctly, then CONFIG_SYS_USE_NOR is coupled to the actual hardware, so either the hardware _has_ NOR flash, then it must be set, or it _doesn't_ have NOR flash, then we don't set it. But it seems the options are there to give the user a choice what medium he wants to use (for e.g. the environment). So if this is correct, then please strip the _SYS_ in them.
Cheers Detlev
Will take care CONFIG name.
-- 14474011154664524427946373126085988481573677491474835889066354349131199152128 If you know why this number is perfect - you're probably a mathematician... -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: dzu@denx.de
participants (5)
-
Detlev Zundel -
Mike Frysinger -
nagabhushana.netagunte＠ti.com -
Netagunte, Nagabhushana
-
Wolfgang Denk