On Wed, 8 Oct 2008 21:26:34 -0700 "Liu Dave-R63238" DaveLiu@freescale.com wrote:
It is due to hardware design and logic defect, that is the I/O[0:7] of NAND chip is connected to LAD[7:0], so when the NAND chip connected to nLCS3, you have to set up the OR3[BCTLD] = '1' for normal operation, otherwise it will have bus contention due to the pin 48/25 of U60 is enabled.
Setup the OR3[BCTLD] = '1' , that meaning the LBCTL is not asserted upon access to the NAND chip, keep the default state.
Acked-by: Dave Liu daveliu@freescale.com
-----Original Message----- From: u-boot-bounces@lists.denx.de [mailto:u-boot-bounces@lists.denx.de] On Behalf Of Anton Vorontsov Sent: 2008?10?9? 12:53 AM To: Phillips Kim-R1AAHA Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH] mpc83xx: add ELBC NAND support for the MPC837XEMDSboards
Though NAND chip is replaceable on the MPC837XE-MDS boards, the current settings don't work with the default chip on the board. Nevertheless Freescale's U-Boot sets the option register correctly, so I just dumped the register from the working u-boot. My guess is that the old settings were applicable for some pilot boards, not found in the production.
This patch also enables FSL ELBC driver so that we could access the NAND storage in the u-boot.
The NAND support costs about 45KB, so the u-boot no longer fits into two 128KB NOR flash sectors, thus we also have to adjust environment location: add another 128KB to the monitor length.
Signed-off-by: Anton Vorontsov avorontsov@ru.mvista.com
applied to 83xx-next.
thanks guys,
Kim