12 May
2014
12 May
'14
4:50 p.m.
On Mon, May 12, 2014 at 07:12:44PM +0530, Balaji T K wrote:
On Monday 12 May 2014 06:58 PM, Tom Rini wrote:
On Fri, May 02, 2014 at 07:25:20PM +0530, Balaji T K wrote:
MMC instance 1 and 2 is capable of ADMA in omap4, omap5. Add support for ADMA and enable ADMA for read/write to improve mmc throughput.
[snip]
@@ -44,12 +45,30 @@ #undef OMAP_HSMMC_USE_GPIO #endif
+#ifdef CONFIG_SPL_BUILD +#undef CONFIG_OMAP_MMC_ADMA +#endif
Why? Especially since a number of the folks interested in this for performance want it for SPL OS mode. Thanks!
Because in SoCs like OMAP4/5 mmc1/2 adma doesn't have access to sram. So can't have descriptor or src / destination buffers (allocated on stack) given by mmc core on sram.
And we can't malloc them?
--
Tom