adopt ti_qspi driver to device driver model
Signed-off-by: Mugunthan V N mugunthanvnm@ti.com --- drivers/spi/ti_qspi.c | 126 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 126 insertions(+)
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index 4893472..4cc26bf 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -11,11 +11,14 @@ #include <asm/arch/omap.h> #include <malloc.h> #include <spi.h> +#include <dm.h> #include <asm/gpio.h> #include <asm/omap_gpio.h> #include <asm/omap_common.h> #include <asm/ti-common/ti-edma3.h>
+DECLARE_GLOBAL_DATA_PTR; + /* ti qpsi register bit masks */ #define QSPI_TIMEOUT 2000000 #define QSPI_FCLK 192000000 @@ -294,6 +297,8 @@ void spi_flash_copy_mmap(void *data, void *offset, size_t len) } #endif
+#ifndef CONFIG_DM_SPI + static inline struct ti_qspi_priv *to_ti_qspi_priv(struct spi_slave *slave) { return container_of(slave, struct ti_qspi_priv, slave); @@ -407,3 +412,124 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, priv->slave.bus, priv->slave.cs, bitlen, flags); return __ti_qspi_xfer(priv, bitlen, dout, din, flags, priv->slave.cs); } + +#else /* CONFIG_DM_SPI */ + +static int ti_qspi_set_speed(struct udevice *bus, uint max_hz) +{ + struct ti_qspi_priv *priv = dev_get_priv(bus); + + ti_spi_set_speed(priv, max_hz); + + return 0; +} + +static int ti_qspi_set_mode(struct udevice *bus, uint mode) +{ + struct ti_qspi_priv *priv = dev_get_priv(bus); + + return __ti_qspi_set_mode(priv, mode); +} + +static int ti_qspi_claim_bus(struct udevice *dev) +{ + struct dm_spi_slave_platdata *slave = dev_get_parent_platdata(dev); + struct ti_qspi_priv *priv; + struct udevice *bus; + + bus = dev->parent; + priv = dev_get_priv(bus); + + return __ti_qspi_claim_bus(priv, slave->cs); +} + +static int ti_qspi_release_bus(struct udevice *dev) +{ + struct ti_qspi_priv *priv; + struct udevice *bus; + + bus = dev->parent; + priv = dev_get_priv(bus); + + __ti_qspi_release_bus(priv); + + return 0; +} + +static int ti_qspi_xfer(struct udevice *dev, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) +{ + struct dm_spi_slave_platdata *slave = dev_get_parent_platdata(dev); + struct ti_qspi_priv *priv; + struct udevice *bus; + + bus = dev->parent; + priv = dev_get_priv(bus); + + return __ti_qspi_xfer(priv, bitlen, dout, din, flags, slave->cs); +} + +static int ti_qspi_probe(struct udevice *bus) +{ + /* Nothing to do in probe */ + return 0; +} + +static int ti_qspi_ofdata_to_platdata(struct udevice *bus) +{ + struct ti_qspi_priv *priv = dev_get_priv(bus); + const void *blob = gd->fdt_blob; + int node = bus->of_offset; + int flash_num = 0, subnode; + + priv->base = (struct ti_qspi_regs *)dev_get_addr(bus); + priv->slave.memory_map = (void *)dev_get_addr_index(bus, 1); + priv->ctrl_mod_mmap = (void *)dev_get_addr_index(bus, 2); + + /* Count flash numbers */ + fdt_for_each_subnode(blob, subnode, node) + ++flash_num; + + if (flash_num == 0) { + debug("Error: Missing flashes!\n"); + return -ENODEV; + } + + priv->slave.max_hz = fdtdec_get_int(blob, node, "spi-max-frequency", + -1); + if (priv->slave.max_hz < 0) { + debug("Error: Max frequency missing\n"); + return -ENODEV; + } + priv->num_cs = fdtdec_get_int(blob, node, "num-cs", 4); + + debug("%s: regs=<0x%x>, max-frequency=%d, num flash = %d\n", + __func__, (int)priv->base, priv->slave.max_hz, flash_num); + + return 0; +} + +static const struct dm_spi_ops ti_qspi_ops = { + .claim_bus = ti_qspi_claim_bus, + .release_bus = ti_qspi_release_bus, + .xfer = ti_qspi_xfer, + .set_speed = ti_qspi_set_speed, + .set_mode = ti_qspi_set_mode, +}; + +static const struct udevice_id ti_qspi_ids[] = { + { .compatible = "ti,dra7xxx-qspi" }, + { .compatible = "ti,am4372-qspi" }, + { } +}; + +U_BOOT_DRIVER(ti_qspi) = { + .name = "ti_qspi", + .id = UCLASS_SPI, + .of_match = ti_qspi_ids, + .ops = &ti_qspi_ops, + .ofdata_to_platdata = ti_qspi_ofdata_to_platdata, + .priv_auto_alloc_size = sizeof(struct ti_qspi_priv), + .probe = ti_qspi_probe, +}; +#endif /* CONFIG_DM_SPI */