Print the silicon revison during boot.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- arch/arm/cpu/arm926ejs/mx25/generic.c | 32 ++++++++++++++++++++++++++++- arch/arm/include/asm/arch-mx25/imx-regs.h | 4 +++ 2 files changed, 35 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c index 76e4b5c..a4e8c14 100644 --- a/arch/arm/cpu/arm926ejs/mx25/generic.c +++ b/arch/arm/cpu/arm926ejs/mx25/generic.c @@ -105,12 +105,42 @@ ulong imx_get_perclk (int clk) return lldiv (fref, div); }
+ +u32 get_cpu_rev(void) +{ + u32 srev; + u32 system_rev = 0x25000; + + /* read SREV register from IIM module */ + struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE; + srev = readl(&iim->iim_srev); + + switch (srev) { + case 0x00: + system_rev |= CHIP_REV_1_0; + break; + case 0x01: + system_rev |= CHIP_REV_1_1; + break; + default: + system_rev |= CHIP_REV_UNKNOWN; + break; + } + + return system_rev; +} + #if defined(CONFIG_DISPLAY_CPUINFO) int print_cpuinfo (void) { char buf[32]; + u32 cpurev; + + cpurev = get_cpu_rev();
- printf ("CPU: Freescale i.MX25 at %s MHz\n\n", + printf("CPU: Freescale i.MX25 rev%d.%d at %s MHz\n\n", + (cpurev & 0x000F0) >> 4, + (cpurev & 0x0000F) >> 0, strmhz (buf, imx_get_armclk ())); return 0; } diff --git a/arch/arm/include/asm/arch-mx25/imx-regs.h b/arch/arm/include/asm/arch-mx25/imx-regs.h index 9e30f7c..92b58be 100644 --- a/arch/arm/include/asm/arch-mx25/imx-regs.h +++ b/arch/arm/include/asm/arch-mx25/imx-regs.h @@ -351,4 +351,8 @@ struct aips_regs { #define GPIO3_BASE_ADDR IMX_GPIO3_BASE #define GPIO4_BASE_ADDR IMX_GPIO4_BASE
+#define CHIP_REV_1_0 0x10 +#define CHIP_REV_1_1 0x11 +#define CHIP_REV_UNKNOWN 0xFF + #endif /* _IMX_REGS_H */