From: Alex Waterman awaterman@dawning.com
Fixes the compile errors in the board specific initializations for the at91sam9m10g45ek specific files.
Signed-off-by: Alex Waterman awaterman@dawning.com --- board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c | 128 +++++++++++------------ board/atmel/at91sam9m10g45ek/led.c | 6 +- 2 files changed, 67 insertions(+), 67 deletions(-)
diff --git a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c index f92b20f..f8e687e 100644 --- a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c +++ b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c @@ -23,6 +23,7 @@ */
#include <common.h> +#include <asm/io.h> #include <asm/sizes.h> #include <asm/arch/at91sam9g45.h> #include <asm/arch/at91sam9_matrix.h> @@ -32,7 +33,6 @@ #include <asm/arch/at91_rstc.h> #include <asm/arch/clk.h> #include <asm/arch/gpio.h> -#include <asm/arch/io.h> #include <asm/arch/hardware.h> #include <lcd.h> #include <atmel_lcdc.h> @@ -41,6 +41,14 @@ #endif #include <netdev.h>
+/* + * arch/arm/include/asm/arch-at91/at91sam9g45.h defines ATMEL_BASE_SCM; + * however, other code still wants AT91_SMC instead. Likewise for the AT91_PMC + * definition. + */ +#define AT91_SMC ATMEL_BASE_SMC +#define AT91_PMC ATMEL_BASE_PMC + DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */ @@ -49,35 +57,35 @@ DECLARE_GLOBAL_DATA_PTR; */
#ifdef CONFIG_CMD_NAND -static void at91sam9m10g45ek_nand_hw_init(void) +void at91sam9m10g45ek_nand_hw_init(void) { unsigned long csa;
/* Enable CS3 */ - csa = at91_sys_read(AT91_MATRIX_EBICSA); - at91_sys_write(AT91_MATRIX_EBICSA, - csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA); + csa = readl(AT91_MATRIX_EBICSA); + writel(csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA, AT91_MATRIX_EBICSA);
/* Configure SMC CS3 for NAND/SmartMedia */ - at91_sys_write(AT91_SMC_SETUP(3), - AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); - at91_sys_write(AT91_SMC_PULSE(3), - AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(3) | - AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(2)); - at91_sys_write(AT91_SMC_CYCLE(3), - AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(4)); - at91_sys_write(AT91_SMC_MODE(3), - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | - AT91_SMC_EXNWMODE_DISABLE | + writel(AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0), + AT91_SMC_SETUP(3)); + writel(AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(3) | + AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(2), + AT91_SMC_PULSE(3)); + + writel(AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(4), + AT91_SMC_CYCLE(3)); + writel(AT91_SMC_READMODE | AT91_SMC_WRITEMODE | + AT91_SMC_EXNWMODE_DISABLE | #ifdef CONFIG_SYS_NAND_DBW_16 AT91_SMC_DBW_16 | #else /* CONFIG_SYS_NAND_DBW_8 */ AT91_SMC_DBW_8 | #endif - AT91_SMC_TDF_(3)); + AT91_SMC_TDF_(3), + AT91_SMC_MODE(3));
- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_PIOC); + writel(1 << ATMEL_ID_PIOC, AT91_PMC_PCER);
/* Configure RDY/BSY */ at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); @@ -90,7 +98,7 @@ static void at91sam9m10g45ek_nand_hw_init(void) #ifdef CONFIG_CMD_USB static void at91sam9m10g45ek_usb_hw_init(void) { - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_PIODE); + writel(1 << ATMEL_ID_PIODE, AT91_PMC_PCER);
at91_set_gpio_output(AT91_PIN_PD1, 0); at91_set_gpio_output(AT91_PIN_PD3, 0); @@ -100,48 +108,13 @@ static void at91sam9m10g45ek_usb_hw_init(void) #ifdef CONFIG_MACB static void at91sam9m10g45ek_macb_hw_init(void) { - unsigned long rstc;
/* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_EMAC); - - /* - * Disable pull-up on: - * RXDV (PA15) => PHY normal mode (not Test mode) - * ERX0 (PA12) => PHY ADDR0 - * ERX1 (PA13) => PHY ADDR1 => PHYADDR = 0x0 - * - * PHY has internal pull-down - */ - writel(pin_to_mask(AT91_PIN_PA15) | - pin_to_mask(AT91_PIN_PA12) | - pin_to_mask(AT91_PIN_PA13), - pin_to_controller(AT91_PIN_PA0) + PIO_PUDR); - - rstc = at91_sys_read(AT91_RSTC_MR); - - /* Need to reset PHY -> 500ms reset */ - at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | - (AT91_RSTC_ERSTL & (0x0D << 8)) | - AT91_RSTC_URSTEN); - - at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST); - - /* Wait for end hardware reset */ - while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL)); - - /* Restore NRST value */ - at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | - (rstc) | - AT91_RSTC_URSTEN); - - /* Re-enable pull-up */ - writel(pin_to_mask(AT91_PIN_PA15) | - pin_to_mask(AT91_PIN_PA12) | - pin_to_mask(AT91_PIN_PA13), - pin_to_controller(AT91_PIN_PA0) + PIO_PUER); + writel(1 << ATMEL_ID_EMAC, AT91_PMC_PCER);
+ /* And the pins. */ at91_macb_hw_init(); + } #endif
@@ -161,7 +134,7 @@ vidinfo_t panel_info = { vl_vsync_len: 1, vl_upper_margin:40, vl_lower_margin:1, - mmio: AT91SAM9G45_LCDC_BASE, + mmio : ATMEL_BASE_LCDC, };
@@ -208,7 +181,7 @@ static void at91sam9m10g45ek_lcd_hw_init(void) at91_set_A_periph(AT91_PIN_PE29, 0); /* LCDD22 */ at91_set_A_periph(AT91_PIN_PE30, 0); /* LCDD23 */
- at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_LCDC); + writel(1 << ATMEL_ID_LCDC, AT91_PMC_PCER);
gd->fb_base = CONFIG_AT91SAM9G45_LCD_BASE; } @@ -227,7 +200,7 @@ void lcd_show_board_info(void) lcd_printf ("(C) 2008 ATMEL Corp\n"); lcd_printf ("at91support@atmel.com\n"); lcd_printf ("%s CPU at %s MHz\n", - CONFIG_SYS_AT91_CPU_NAME, + ATMEL_CPU_NAME, strmhz(temp, get_cpu_clk_rate()));
dram_size = 0; @@ -257,7 +230,8 @@ int board_init(void) /* adress of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
- at91_serial_hw_init(); + + #ifdef CONFIG_CMD_NAND at91sam9m10g45ek_nand_hw_init(); #endif @@ -270,11 +244,9 @@ int board_init(void) #ifdef CONFIG_ATMEL_SPI at91_spi0_hw_init(1 << 4); #endif - #ifdef CONFIG_MACB at91sam9m10g45ek_macb_hw_init(); #endif - #ifdef CONFIG_LCD at91sam9m10g45ek_lcd_hw_init(); #endif @@ -283,9 +255,23 @@ int board_init(void)
int dram_init(void) { + gd->ram_size = PHYS_SDRAM_SIZE; + return 0; +} + +void dram_init_banksize() +{ + + /* Bank 1. */ gd->bd->bi_dram[0].start = PHYS_SDRAM; gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; - return 0; + + /* Bank 2. */ +#if (CONFIG_NR_DRAM_BANKS == 2) + gd->bd->bi_dram[1].start = PHYS_SDRAM_2; + gd->bd->bi_dram[1].size = PHYS_SDRAM_SIZE_2; +#endif + }
#ifdef CONFIG_RESET_PHY_R @@ -298,7 +284,7 @@ int board_eth_init(bd_t *bis) { int rc = 0; #ifdef CONFIG_MACB - rc = macb_eth_initialize(0, (void *)AT91SAM9G45_BASE_EMAC, 0x00); + rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00); #endif return rc; } @@ -338,3 +324,15 @@ void spi_cs_deactivate(struct spi_slave *slave) } } #endif /* CONFIG_ATMEL_SPI */ + +extern void at91_serial_hw_init(void); +/* + * (re)Initialize the serial hardware. + */ +int board_early_init_f(void) +{ + + at91_serial_hw_init(); + return 0; + +} diff --git a/board/atmel/at91sam9m10g45ek/led.c b/board/atmel/at91sam9m10g45ek/led.c index ff59a2d..b939c5b 100644 --- a/board/atmel/at91sam9m10g45ek/led.c +++ b/board/atmel/at91sam9m10g45ek/led.c @@ -23,15 +23,17 @@ */
#include <common.h> +#include <asm/io.h> #include <asm/arch/at91sam9g45.h> #include <asm/arch/at91_pmc.h> #include <asm/arch/gpio.h> -#include <asm/arch/io.h> + +#define AT91_PMC ATMEL_BASE_PMC
void coloured_LED_init(void) { /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_PIODE); + writel(AT91_PMC_PCER, 1 << ATMEL_ID_PIODE);
at91_set_gpio_output(CONFIG_RED_LED, 1); at91_set_gpio_output(CONFIG_GREEN_LED, 1);