8 Jun
2020
8 Jun
'20
7:23 p.m.
The iMX7D RM 9.2.4.9.3 Power removal flow Table 9-11. Re-enabling power explicitly says both the DDR controller and the PHY must be reset in the correct sequence. Currently the code only resets the controller. This leads to a misbehavior where the system brings the DRAM up after reboot, but the DRAM is unstable. Add the missing reset. The easiest way to trigger this is by triggering WDT without having the WDT assert WDOG_B signal, i.e. mw.w 0x30280000 0x25 . Signed-off-by: Marek Vasut marex@denx.de Cc: Fabio Estevam festevam@gmail.com Cc: NXP i.MX U-Boot Team uboot-imx@nxp.com Cc: Peng Fan peng.fan@nxp.com Cc: Stefano Babic sbabic@denx.de
Applied to u-boot-imx, master, thanks !
Best regards, Stefano Babic
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