Platform knows whether MRC cache is implemented, but using it can be a choice of a specific board.
Signed-off-by: Bin Meng bmeng.cn@gmail.com ---
Changes in v2: None
arch/x86/cpu/baytrail/Kconfig | 1 + arch/x86/cpu/broadwell/Kconfig | 1 + arch/x86/cpu/ivybridge/Kconfig | 1 + arch/x86/cpu/quark/Kconfig | 1 + configs/bayleybay_defconfig | 1 - configs/chromebook_link64_defconfig | 1 - configs/chromebook_link_defconfig | 1 - configs/chromebook_samus_defconfig | 1 - configs/chromebox_panther_defconfig | 1 - configs/conga-qeval20-qa3-e3845-internal-uart_defconfig | 1 - configs/conga-qeval20-qa3-e3845_defconfig | 1 - configs/cougarcanyon2_defconfig | 1 + configs/dfi-bt700-q7x-151_defconfig | 1 - configs/galileo_defconfig | 1 - configs/minnowmax_defconfig | 1 - configs/som-db5800-som-6867_defconfig | 1 - configs/theadorable-x86-dfi-bt700_defconfig | 1 - 17 files changed, 5 insertions(+), 12 deletions(-)
diff --git a/arch/x86/cpu/baytrail/Kconfig b/arch/x86/cpu/baytrail/Kconfig index ac27e7a..57a3a96 100644 --- a/arch/x86/cpu/baytrail/Kconfig +++ b/arch/x86/cpu/baytrail/Kconfig @@ -10,6 +10,7 @@ config INTEL_BAYTRAIL select ARCH_MISC_INIT if !EFI imply ENV_IS_IN_SPI_FLASH imply HAVE_INTEL_ME if !EFI + imply ENABLE_MRC_CACHE
if INTEL_BAYTRAIL config INTERNAL_UART diff --git a/arch/x86/cpu/broadwell/Kconfig b/arch/x86/cpu/broadwell/Kconfig index f3006c3..a9a461d 100644 --- a/arch/x86/cpu/broadwell/Kconfig +++ b/arch/x86/cpu/broadwell/Kconfig @@ -8,6 +8,7 @@ config INTEL_BROADWELL select CACHE_MRC_BIN select ARCH_EARLY_INIT_R imply HAVE_INTEL_ME + imply ENABLE_MRC_CACHE
if INTEL_BROADWELL
diff --git a/arch/x86/cpu/ivybridge/Kconfig b/arch/x86/cpu/ivybridge/Kconfig index ed6b834..5df5e3a 100644 --- a/arch/x86/cpu/ivybridge/Kconfig +++ b/arch/x86/cpu/ivybridge/Kconfig @@ -9,6 +9,7 @@ config NORTHBRIDGE_INTEL_IVYBRIDGE bool select CACHE_MRC_BIN if HAVE_MRC imply HAVE_INTEL_ME + imply ENABLE_MRC_CACHE
if NORTHBRIDGE_INTEL_IVYBRIDGE
diff --git a/arch/x86/cpu/quark/Kconfig b/arch/x86/cpu/quark/Kconfig index 9e7d983..68bb219 100644 --- a/arch/x86/cpu/quark/Kconfig +++ b/arch/x86/cpu/quark/Kconfig @@ -9,6 +9,7 @@ config INTEL_QUARK select HAVE_RMU select ARCH_EARLY_INIT_R select ARCH_MISC_INIT + imply ENABLE_MRC_CACHE
if INTEL_QUARK
diff --git a/configs/bayleybay_defconfig b/configs/bayleybay_defconfig index bf00390..036ea20 100644 --- a/configs/bayleybay_defconfig +++ b/configs/bayleybay_defconfig @@ -3,7 +3,6 @@ CONFIG_VENDOR_INTEL=y CONFIG_DEFAULT_DEVICE_TREE="bayleybay" CONFIG_TARGET_BAYLEYBAY=y CONFIG_INTERNAL_UART=y -CONFIG_ENABLE_MRC_CACHE=y CONFIG_SMP=y CONFIG_HAVE_VGA_BIOS=y CONFIG_VGA_BIOS_ADDR=0xfffa0000 diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig index 5224497..c8f6c2b 100644 --- a/configs/chromebook_link64_defconfig +++ b/configs/chromebook_link64_defconfig @@ -11,7 +11,6 @@ CONFIG_VENDOR_GOOGLE=y CONFIG_DEFAULT_DEVICE_TREE="chromebook_link" CONFIG_TARGET_CHROMEBOOK_LINK64=y CONFIG_DEBUG_UART=y -CONFIG_ENABLE_MRC_CACHE=y CONFIG_HAVE_MRC=y CONFIG_SMP=y CONFIG_HAVE_VGA_BIOS=y diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig index 495a5bc..83af9e1 100644 --- a/configs/chromebook_link_defconfig +++ b/configs/chromebook_link_defconfig @@ -4,7 +4,6 @@ CONFIG_VENDOR_GOOGLE=y CONFIG_DEFAULT_DEVICE_TREE="chromebook_link" CONFIG_TARGET_CHROMEBOOK_LINK=y CONFIG_DEBUG_UART=y -CONFIG_ENABLE_MRC_CACHE=y CONFIG_HAVE_MRC=y CONFIG_SMP=y CONFIG_HAVE_VGA_BIOS=y diff --git a/configs/chromebook_samus_defconfig b/configs/chromebook_samus_defconfig index 39a9b0d..7af4898 100644 --- a/configs/chromebook_samus_defconfig +++ b/configs/chromebook_samus_defconfig @@ -4,7 +4,6 @@ CONFIG_VENDOR_GOOGLE=y CONFIG_DEFAULT_DEVICE_TREE="chromebook_samus" CONFIG_TARGET_CHROMEBOOK_SAMUS=y CONFIG_DEBUG_UART=y -CONFIG_ENABLE_MRC_CACHE=y CONFIG_HAVE_MRC=y CONFIG_HAVE_REFCODE=y CONFIG_SMP=y diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig index 4052f5c..6cc2953 100644 --- a/configs/chromebox_panther_defconfig +++ b/configs/chromebox_panther_defconfig @@ -2,7 +2,6 @@ CONFIG_X86=y CONFIG_VENDOR_GOOGLE=y CONFIG_DEFAULT_DEVICE_TREE="chromebox_panther" CONFIG_TARGET_CHROMEBOX_PANTHER=y -CONFIG_ENABLE_MRC_CACHE=y CONFIG_HAVE_MRC=y CONFIG_HAVE_VGA_BIOS=y CONFIG_FIT=y diff --git a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig index fe75414..20e64fd 100644 --- a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig +++ b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig @@ -4,7 +4,6 @@ CONFIG_TARGET_CONGA_QEVAL20_QA3_E3845=y CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845" CONFIG_INTERNAL_UART=y CONFIG_DEBUG_UART=y -CONFIG_ENABLE_MRC_CACHE=y CONFIG_SMP=y CONFIG_HAVE_VGA_BIOS=y CONFIG_GENERATE_PIRQ_TABLE=y diff --git a/configs/conga-qeval20-qa3-e3845_defconfig b/configs/conga-qeval20-qa3-e3845_defconfig index 334f0a2..496479a 100644 --- a/configs/conga-qeval20-qa3-e3845_defconfig +++ b/configs/conga-qeval20-qa3-e3845_defconfig @@ -3,7 +3,6 @@ CONFIG_VENDOR_CONGATEC=y CONFIG_TARGET_CONGA_QEVAL20_QA3_E3845=y CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845" CONFIG_DEBUG_UART=y -CONFIG_ENABLE_MRC_CACHE=y CONFIG_SMP=y CONFIG_HAVE_VGA_BIOS=y CONFIG_GENERATE_PIRQ_TABLE=y diff --git a/configs/cougarcanyon2_defconfig b/configs/cougarcanyon2_defconfig index 84856aa..ea56e58 100644 --- a/configs/cougarcanyon2_defconfig +++ b/configs/cougarcanyon2_defconfig @@ -2,6 +2,7 @@ CONFIG_X86=y CONFIG_VENDOR_INTEL=y CONFIG_DEFAULT_DEVICE_TREE="cougarcanyon2" CONFIG_TARGET_COUGARCANYON2=y +# CONFIG_ENABLE_MRC_CACHE is not set CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_CONSOLE_MUX=y CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/dfi-bt700-q7x-151_defconfig b/configs/dfi-bt700-q7x-151_defconfig index 76cdf55..193bb54 100644 --- a/configs/dfi-bt700-q7x-151_defconfig +++ b/configs/dfi-bt700-q7x-151_defconfig @@ -3,7 +3,6 @@ CONFIG_VENDOR_DFI=y CONFIG_DEFAULT_DEVICE_TREE="dfi-bt700-q7x-151" CONFIG_TARGET_DFI_BT700=y CONFIG_DEBUG_UART=y -CONFIG_ENABLE_MRC_CACHE=y CONFIG_SMP=y CONFIG_HAVE_VGA_BIOS=y CONFIG_GENERATE_PIRQ_TABLE=y diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig index f53970a..e8b11e4 100644 --- a/configs/galileo_defconfig +++ b/configs/galileo_defconfig @@ -2,7 +2,6 @@ CONFIG_X86=y CONFIG_VENDOR_INTEL=y CONFIG_DEFAULT_DEVICE_TREE="galileo" CONFIG_TARGET_GALILEO=y -CONFIG_ENABLE_MRC_CACHE=y CONFIG_GENERATE_PIRQ_TABLE=y CONFIG_GENERATE_MP_TABLE=y CONFIG_GENERATE_ACPI_TABLE=y diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig index 1301c16..3d8fdbf 100644 --- a/configs/minnowmax_defconfig +++ b/configs/minnowmax_defconfig @@ -4,7 +4,6 @@ CONFIG_DEFAULT_DEVICE_TREE="minnowmax" CONFIG_TARGET_MINNOWMAX=y CONFIG_INTERNAL_UART=y CONFIG_DEBUG_UART=y -CONFIG_ENABLE_MRC_CACHE=y CONFIG_SMP=y CONFIG_HAVE_VGA_BIOS=y CONFIG_GENERATE_PIRQ_TABLE=y diff --git a/configs/som-db5800-som-6867_defconfig b/configs/som-db5800-som-6867_defconfig index c393d72..52d8d6e 100644 --- a/configs/som-db5800-som-6867_defconfig +++ b/configs/som-db5800-som-6867_defconfig @@ -3,7 +3,6 @@ CONFIG_VENDOR_ADVANTECH=y CONFIG_TARGET_SOM_DB5800_SOM_6867=y CONFIG_DEFAULT_DEVICE_TREE="baytrail_som-db5800-som-6867" CONFIG_DEBUG_UART=y -CONFIG_ENABLE_MRC_CACHE=y CONFIG_SMP=y CONFIG_HAVE_VGA_BIOS=y CONFIG_GENERATE_PIRQ_TABLE=y diff --git a/configs/theadorable-x86-dfi-bt700_defconfig b/configs/theadorable-x86-dfi-bt700_defconfig index dee551b..bbc0fce 100644 --- a/configs/theadorable-x86-dfi-bt700_defconfig +++ b/configs/theadorable-x86-dfi-bt700_defconfig @@ -2,7 +2,6 @@ CONFIG_X86=y CONFIG_VENDOR_DFI=y CONFIG_DEFAULT_DEVICE_TREE="theadorable-x86-dfi-bt700" CONFIG_TARGET_DFI_BT700=y -CONFIG_ENABLE_MRC_CACHE=y CONFIG_SMP=y CONFIG_HAVE_VGA_BIOS=y CONFIG_VGA_BIOS_ADDR=0xfffa0000