From: Fabio Estevam fabio.estevam@freescale.com
mx28evk has a LAN8270 ethernet phy and we can use the phylib framework.
One of the advantages of converting to phylib is that we no longer see a timeout prior to the first transfer in the 'tftp' command.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- After applying this patch I get:
U-Boot 2013.04-11810-gd6d75ec-dirty (Jul 12 2013 - 01:15:03)
CPU: Freescale i.MX28 rev1.2 at 454 MHz BOOT: SSP SD/MMC #0, 3V3 DRAM: 128 MiB MMC: MXS MMC: 0 Video: MXSFB: 'videomode' variable not set! In: serial Out: serial Err: serial Net: Phy not found
I still get this 'Phy not found' message, but I think this is not related to the board code.
board/freescale/mx28evk/mx28evk.c | 15 +-------------- include/configs/mx28evk.h | 3 ++- 2 files changed, 3 insertions(+), 15 deletions(-)
diff --git a/board/freescale/mx28evk/mx28evk.c b/board/freescale/mx28evk/mx28evk.c index 4edd9f4..cd81d58 100644 --- a/board/freescale/mx28evk/mx28evk.c +++ b/board/freescale/mx28evk/mx28evk.c @@ -110,7 +110,6 @@ int board_eth_init(bd_t *bis) { struct mxs_clkctrl_regs *clkctrl_regs = (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; - struct eth_device *dev; int ret;
ret = cpu_eth_init(bis); @@ -133,24 +132,12 @@ int board_eth_init(bd_t *bis) return ret; }
- ret = fecmxc_initialize_multi(bis, 1, 3, MXS_ENET1_BASE); + ret = fecmxc_initialize_multi(bis, 1, 1, MXS_ENET1_BASE); if (ret) { puts("FEC MXS: Unable to init FEC1\n"); return ret; }
- dev = eth_get_dev_by_name("FEC0"); - if (!dev) { - puts("FEC MXS: Unable to get FEC0 device entry\n"); - return -EINVAL; - } - - dev = eth_get_dev_by_name("FEC1"); - if (!dev) { - puts("FEC MXS: Unable to get FEC1 device entry\n"); - return -EINVAL; - } - return ret; }
diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index de69182..2431b83 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -170,12 +170,13 @@
/* Ethernet on SOC (FEC) */ #ifdef CONFIG_CMD_NET -#define CONFIG_NET_MULTI #define CONFIG_ETHPRIME "FEC0" #define CONFIG_FEC_MXC #define CONFIG_MII #define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_MX28_FEC_MAC_IN_OCOTP +#define CONFIG_PHYLIB +#define CONFIG_PHY_SMSC #endif
/* RTC */