The Bananapi M3 has an RTL8211E PHY connected to the EMAC using RGMII. The PHY is powered by DCDC1 through SW @ 3.3V.
This patch adds a U-boot specific dtsi file for the board adding an enabled EMAC node, and enables the EMAC driver in the defconfig. The binding used here is the old revision currently supported in U-boot. The U-boot driver has not been updated to support the new binding.
Signed-off-by: Chen-Yu Tsai wens@csie.org --- arch/arm/dts/sun8i-a83t-bananapi-m3-u-boot.dtsi | 40 +++++++++++++++++++++++++ configs/Sinovoip_BPI_M3_defconfig | 2 ++ 2 files changed, 42 insertions(+) create mode 100644 arch/arm/dts/sun8i-a83t-bananapi-m3-u-boot.dtsi
diff --git a/arch/arm/dts/sun8i-a83t-bananapi-m3-u-boot.dtsi b/arch/arm/dts/sun8i-a83t-bananapi-m3-u-boot.dtsi new file mode 100644 index 000000000000..5ac29058cc42 --- /dev/null +++ b/arch/arm/dts/sun8i-a83t-bananapi-m3-u-boot.dtsi @@ -0,0 +1,40 @@ +#include "sunxi-u-boot.dtsi" + +/ { + aliases { + ethernet0 = &emac; + }; + + soc { + emac: ethernet@01c30000 { + compatible = "allwinner,sun8i-a83t-emac"; + reg = <0x01c30000 0x2000>, <0x01c00030 0x4>; + reg-names = "emac", "syscon"; + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + phy-mode = "rgmii"; + phy = <&phy1>; + allwinner,rx-delay-ps = <700>; + allwinner,tx-delay-ps = <700>; + status = "okay"; + + phy1: ethernet-phy@1 { + reg = <1>; + }; + }; + }; +}; + +&pio { + rgmii_pins: rgmii_pins { + allwinner,pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", + "PD11", "PD12", "PD13", "PD14", "PD18", + "PD19", "PD21", "PD22", "PD23"; + allwinner,function = "emac"; + allwinner,drive = <3>; + allwinner,pull = <0>; + }; +}; diff --git a/configs/Sinovoip_BPI_M3_defconfig b/configs/Sinovoip_BPI_M3_defconfig index 60aea1eb3d22..6360e3761e6b 100644 --- a/configs/Sinovoip_BPI_M3_defconfig +++ b/configs/Sinovoip_BPI_M3_defconfig @@ -22,6 +22,8 @@ CONFIG_SPL=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_ISO_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set +CONFIG_PHY_REALTEK=y +CONFIG_SUN8I_EMAC=y CONFIG_AXP_DCDC5_VOLT=1200 CONFIG_AXP_DLDO3_VOLT=2500 CONFIG_AXP_SW_ON=y