Hi Stefan,
On 09 December 2016 12:19, Stefan Roese wrote:
On 09.12.2016 11:41, Phil Edworthy wrote:
This has been tested with a Marvell 88E1512 PHY.
Signed-off-by: Phil Edworthy phil.edworthy@renesas.com
drivers/net/phy/marvell.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c index a7ea435..8214760 100644 --- a/drivers/net/phy/marvell.c +++ b/drivers/net/phy/marvell.c @@ -300,13 +300,19 @@ static int m88e1518_config(struct phy_device
*phydev)
phy_write(phydev, MDIO_DEVAD_NONE, 16, 0x2159); phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x0000);
- /* SGMII-to-Copper mode initialization */
- if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
- /* SGMII/RGMII-to-Copper mode initialization */
- if ((phydev->interface == PHY_INTERFACE_MODE_SGMII) ||
phy_interface_is_rgmii(phydev)) {
/* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */m88e1518_phy_writebits(phydev, 20, 0, 3, 1);
if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {/* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */m88e1518_phy_writebits(phydev, 20, 0, 3, 1);} else {/* In reg 20, write MODE[2:0] = 0x0 (RGMII to Copper) */m88e1518_phy_writebits(phydev, 20, 0, 3, 0);}/* PHY reset is necessary after changing MODE[2:0] */ m88e1518_phy_writebits(phydev, 20, 15, 1, 1);
Joe has recently sent a patch, adding some nice macros for the some "standard" Marvell PHY register, like PAGE [1]. So this patch will most likely generate some merge problems. Please rebase it on top of Joe's patch.
Will do!
Thanks Phil
Other than this:
Reviewed-by: Stefan Roese sr@denx.de
Thanks, Stefan