Hi all,
I'd like to implemente BITBANGMII for MPC8548 with a external Marvell 88E1111 PHY as RGMII interface. The reason was that this board's MII control lines MDC was broken as HIGH level always(Sure, it worked right with tsec driver). So u-boot reported no PHY found - Bad news:-(
I followed EP8248 BITBANGMII way to use CPLD to implementate BITBANGMII but couldn't read PHY register correctly - PHY ID still unknown.
I wonder whether eTSEC controller can use BITBANGMII way to work with outside PHY. Seems that no MII support eTSEC driver not functional.
<board>.h #define CONFIG_BITBANGMII
#define MDIO_PORT 0 /* Not used - implemented in BCSR */ #define MDIO_ACTIVE \ (*(vu_char *)(CFG_BCSR + 83) |= 0x01) #define MDIO_TRISTATE \ (*(vu_char *)(CFG_BCSR + 83) &= 0xFE) #define MDIO_READ \ ((*(vu_char *)(CFG_BCSR + 83) & 1) != 0)
#define MDIO(bit) \ if(bit) *(vu_char *)(CFG_BCSR + 83) |= 0x01; \ else *(vu_char *)(CFG_BCSR + 83) &= 0xFE
#define MDC(bit) \ if(bit) *(vu_char *)(CFG_BCSR + 83) |= 0x02; \ else *(vu_char *)(CFG_BCSR + 83) &= 0xFD #define MIIDELAY udelay(1)
drivers/tsec.c uint read_phy_reg(struct tsec_private *priv, uint regnum) { uint value; volatile tsec_t *regbase = priv->phyregs; uint phyid = priv->phyaddr;
+#ifndef CONFIG_BITBANGMII /* Put the address of the phy, and the register * number into MIIMADD */ regbase->miimadd = (phyid << 8) | regnum; @@ -281,6 +292,11 @@ uint read_phy_reg(struct tsec_private *p
/* Grab the value read from the PHY */ value = regbase->miimstat; +#else bb_miiphy_read (NULL, phyid, regnum, &value); +#endif /* CONFIG_BITBANGMII */
Am I on the right track?
Thanks in advance,
Sam
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