
1 Feb
2011
1 Feb
'11
6:58 p.m.
On 01/20/2011 09:46 AM, Stefano Babic wrote:
From: Anatolij Gustschin agust@denx.de
The MXC SPI driver didn't calculate the SPI clock up to now and just used highest possible divider 512 for DATA RATE in the control register. This results in very low transfer rates.
The patch adds code to calculate and setup the SPI clock frequency for transfers.
Signed-off-by: Anatolij Gustschin agust@denx.de Signed-off-by: Stefano Babic sbabic@denx.de
Applied to u-boot-imx, thanks
Best regards, Stefano Babic
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