
Hi Mauro,
On 27.12.19 14:25, Mauro Condarelli wrote:
Small patch series to add support for VoCore/VoCore2 board.
VoCore is open hardware and runs OpenWrt/LEDE. It has WIFI, USB, UART, 20+ GPIOs but is only one inch square. It will help you to make a smart house, study embedded system or even make the tiniest router in the world.
Details about this SoM can be found at "https://vocore.io/v2.html".
Signed-off-by: Mauro Condarelli mc5686@mclink.it
Changes in v2:
Removed some dead code
Changed Author to my full name (no nick)
Removed unwanted fixup to .dts generation (not my call).
Fixed commit message
Fixed various variables/filenames to include Vendor name
Changed Vendor name (Vonger -> Vocore)
MAINTAINERS | 1 + arch/mips/dts/Makefile | 1 + arch/mips/dts/vocore_vocore2.dts | 62 ++++++++++++++++++++++++++++++++ arch/mips/mach-mtmips/Kconfig | 9 +++++ board/vocore/vocore2/Kconfig | 11 ++++++ board/vocore/vocore2/Makefile | 2 ++ board/vocore/vocore2/board.c | 35 ++++++++++++++++++ configs/vocore2_defconfig | 62 ++++++++++++++++++++++++++++++++ include/configs/vocore2.h | 50 ++++++++++++++++++++++++++ 9 files changed, 233 insertions(+) create mode 100644 arch/mips/dts/vocore_vocore2.dts create mode 100644 board/vocore/vocore2/Kconfig create mode 100644 board/vocore/vocore2/Makefile create mode 100644 board/vocore/vocore2/board.c create mode 100644 configs/vocore2_defconfig create mode 100644 include/configs/vocore2.h
diff --git a/MAINTAINERS b/MAINTAINERS index 8d588b7d64..8c15deaafe 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1,3 +1,4 @@ +source /home/mcon/.basheditor/remote-debugging-v1.sh localhost 33333 #BASHEDITOR-TMP-REMOTE-DEBUGGING-END|Origin line: Descriptions of section entries:
P: Person (obsolete) diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile index c9d75596f2..5ece224511 100644 --- a/arch/mips/dts/Makefile +++ b/arch/mips/dts/Makefile @@ -22,6 +22,7 @@ dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) += netgear,dgnd3700v2.dtb dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f@st1704.dtb dtb-$(CONFIG_BOARD_SFR_NB4_SER) += sfr,nb4-ser.dtb dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb +dtb-$(CONFIG_BOARD_VOCORE2) += vocore_vocore2.dtb dtb-$(CONFIG_TARGET_JZ4780_CI20) += ci20.dtb dtb-$(CONFIG_SOC_LUTON) += luton_pcb090.dtb luton_pcb091.dtb dtb-$(CONFIG_SOC_OCELOT) += ocelot_pcb120.dtb ocelot_pcb123.dtb diff --git a/arch/mips/dts/vocore_vocore2.dts b/arch/mips/dts/vocore_vocore2.dts new file mode 100644 index 0000000000..cdcd9b4e1d --- /dev/null +++ b/arch/mips/dts/vocore_vocore2.dts @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*
- Copyright (C) 2019 Mauro Condarelli mc5686@mclink.it
- */
+/dts-v1/; +#include "mt7628a.dtsi"
+/ {
- compatible = "vocore,vocore2", "ralink,mt7628a-soc";
- model = "VoCore2";
- aliases {
serial0 = &uart2;
spi0 = &spi0;
- };
- memory@0 {
device_type = "memory";
reg = <0x0 0x08000000>;
- };
- chosen {
bootargs = "console=ttyS2,115200";
stdout-path = &uart2;
- };
+};
+&pinctrl {
- state_default: pin_state {
p0led {
groups = "p0led_a";
function = "led";
};
- };
+};
+&uart2 {
- status = "okay";
+};
+&spi0 {
- status = "okay";
- nor0: m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "m25p80";
spi-max-frequency = <10000000>;
reg = <0x0>;
m25p,chunked-io = <32>;
Do you need these m25p properties? Does not the generic version work for you like in the linkit:
spi-flash@0 { #address-cells = <1>; #size-cells = <1>; compatible = "jedec,spi-nor"; spi-max-frequency = <25000000>; reg = <0>; };
?
- };
+};
+ð {
- pinctrl-names = "default";
- pinctrl-0 = <&ephy_iot_mode>;
- mediatek,poll-link-phy = <0>;
+};
+&mmc {
- status = "okay";
+}; diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig index c8dcf19c0d..57dfaebaec 100644 --- a/arch/mips/mach-mtmips/Kconfig +++ b/arch/mips/mach-mtmips/Kconfig @@ -43,6 +43,14 @@ config BOARD_LINKIT_SMART_7688 ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs, and a MT7688 (PCIe).
+config BOARD_VOCORE2
bool "VoCore2"
depends on SOC_MT7628
select SUPPORTS_BOOT_RAM
help
VoCore VoCore2 board has a MT7628 SoC with 128 MiB of RAM
and 16 MiB of flash (SPI).
endchoice
choice
@@ -134,5 +142,6 @@ config SUPPORTS_BOOT_RAM
source "board/gardena/smart-gateway-mt7688/Kconfig" source "board/seeed/linkit-smart-7688/Kconfig" +source "board/vocore/vocore2/Kconfig"
endmenu diff --git a/board/vocore/vocore2/Kconfig b/board/vocore/vocore2/Kconfig new file mode 100644 index 0000000000..9178c3ab32 --- /dev/null +++ b/board/vocore/vocore2/Kconfig @@ -0,0 +1,11 @@ +if BOARD_VOCORE2 +config SYS_BOARD
- default "vocore2"
+config SYS_VENDOR
- default "vocore"
+config SYS_CONFIG_NAME
- default "vocore2"
+endif diff --git a/board/vocore/vocore2/Makefile b/board/vocore/vocore2/Makefile new file mode 100644 index 0000000000..4b162318c2 --- /dev/null +++ b/board/vocore/vocore2/Makefile @@ -0,0 +1,2 @@
+obj-y := board.o diff --git a/board/vocore/vocore2/board.c b/board/vocore/vocore2/board.c new file mode 100644 index 0000000000..1ab430247b --- /dev/null +++ b/board/vocore/vocore2/board.c @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*
- Copyright (C) 2019 Mauro Condarelli mc5686@mclink.it
- Note: this is largely copied from:
board/seeed/linkit_smart_7688/board.c
Copyright (C) 2018 Stefan Roese <sr@denx.de>
- */
+#include <common.h> +#include <asm/io.h>
+#define MT76XX_GPIO1_MODE 0x10000060
+DECLARE_GLOBAL_DATA_PTR;
+void board_debug_uart_init(void) +{
- void __iomem *gpio_mode;
- /* Select UART2 mode instead of GPIO mode (default) */
- gpio_mode = ioremap_nocache(MT76XX_GPIO1_MODE, 0x100);
- clrbits_le32(gpio_mode, GENMASK(27, 26));
+}
+int board_early_init_f(void) +{
- /*
* The pin muxing of UART2 also needs to be done, if debug uart
* is not enabled. So we need to call this function here as well.
*/
- board_debug_uart_init();
- return 0;
+} diff --git a/configs/vocore2_defconfig b/configs/vocore2_defconfig new file mode 100644 index 0000000000..fe56d8f196 --- /dev/null +++ b/configs/vocore2_defconfig @@ -0,0 +1,62 @@ +CONFIG_MIPS=y +CONFIG_SYS_TEXT_BASE=0x80010000 +CONFIG_ENV_SIZE=0x00001000 +CONFIG_ENV_OFFSET=0x00FFE000 +CONFIG_ENV_SECT_SIZE=0x00001000 +CONFIG_ARCH_MTMIPS=y +CONFIG_BOARD_VOCORE2=y +CONFIG_MIPS_BOOT_FDT=y +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_SYS_BOOT_GET_CMDLINE=y +CONFIG_SYS_BOOT_GET_KBD=y +# CONFIG_LEGACY_IMAGE_FORMAT is not set +# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_USE_BOOTARGS=y +CONFIG_LOGLEVEL=8 +CONFIG_VERSION_VARIABLE=y +CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_AUTOBOOT is not set +# CONFIG_BOOTM_NETBSD is not set +# CONFIG_BOOTM_PLAN9 is not set +# CONFIG_BOOTM_RTEMS is not set +# CONFIG_BOOTM_VXWORKS is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MTD=y +CONFIG_CMD_PART=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=spi0.0" +CONFIG_MTDPARTS_DEFAULT="spi0.0:320k(u-boot),2752k(kernel),13304k(filesystem),4k(env),-(factory)" +# CONFIG_ISO_PARTITION is not set +CONFIG_DEFAULT_DEVICE_TREE="vocore_vocore2" +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_ENV_ADDR=0x00FFE000 +# CONFIG_NET is not set +# CONFIG_DM_DEVICE_REMOVE is not set +CONFIG_BLK=y +# CONFIG_INPUT is not set +CONFIG_LED=y +CONFIG_LED_BLINK=y +CONFIG_LED_GPIO=y +CONFIG_MTD=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_MTD=y +# CONFIG_DM_ETH is not set +# CONFIG_RAM_ROCKCHIP_DEBUG is not set +CONFIG_SPECIFY_CONSOLE_INDEX=y +CONFIG_CONS_INDEX=3 +CONFIG_SPI=y +CONFIG_MT7621_SPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_STORAGE=y +CONFIG_LZMA=y +CONFIG_LZO=y diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h new file mode 100644 index 0000000000..e7e6ac3666 --- /dev/null +++ b/include/configs/vocore2.h @@ -0,0 +1,50 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/*
- Copyright (C) 2019 Mauro Condarelli mc5686@mclink.it
- */
+#ifndef __VOCORE2_CONFIG_H__ +#define __VOCORE2_CONFIG_H__
+/* CPU */ +#define CONFIG_SYS_MIPS_TIMER_FREQ 290000000
+/* RAM */ +#define CONFIG_SYS_SDRAM_BASE 0x80000000
+#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000
+#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
+#ifdef CONFIG_BOOT_RAM +#define CONFIG_SKIP_LOWLEVEL_INIT +#endif
+/* UART */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
115200, 230400, 460800, 921600 }
+#define CONFIG_BAUDRATE 115200
Is this define really needed?
+/* RAM */ +#define CONFIG_SYS_MEMTEST_START 0x80100000 +#define CONFIG_SYS_MEMTEST_END 0x80400000
+/* Memory usage */ +#define CONFIG_SYS_MAXARGS 64 +#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) +#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) +#define CONFIG_SYS_CBSIZE 512
This looks like an indentation problem. Please use tabs not spaces to align.
+/* U-Boot */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
+/* Environment settings */ +#if defined(CONFIG_MTDIDS_DEFAULT) && defined(CONFIG_MTDPARTS_DEFAULT) +#define CONFIG_EXTRA_ENV_SETTINGS \
- "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
- "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
+#endif
+#define CONFIG_ENV_IS_IN_SPI_FLASH 1
+#endif//__VOCORE2_CONFIG_H__
Did you run checkpatch.pl on this patch? I would suspect that the last line would raise a warning (missing space).
Thanks, Stefan