Hi,
On 08/19/2015 08:46 PM, Marek Vasut wrote:
On Saturday, August 15, 2015 at 04:15:58 AM, Vikas Manocha wrote:
Indirect read/write start addresses are flash start addresses for indirect read or write transfers. These should be absolute flash addresses instead of offsets.
Signed-off-by: Vikas Manocha vikas.manocha@st.com
Changes in v3: none Changes in v2: Rebased to master
drivers/spi/cadence_qspi_apb.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index b46e5fe..6b5ae30 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -705,7 +705,8 @@ int cadence_qspi_apb_indirect_read_setup(struct cadence_spi_platdata *plat,
/* Get address */ addr_value = cadence_qspi_apb_cmd2addr(&cmdbuf[1], addr_bytes);
- writel(addr_value, plat->regbase + CQSPI_REG_INDIRECTRDSTARTADDR);
- writel((u32)plat->ahbbase + addr_value,
plat->regbase + CQSPI_REG_INDIRECTRDSTARTADDR);Please drop this (u32) cast, it's misleading and problematic.
ok, Thanks for it.
/* The remaining lenght is dummy bytes. */ dummy_bytes = cmdlen - addr_bytes - 1; @@ -795,7 +796,8 @@ int cadence_qspi_apb_indirect_write_setup(struct cadence_spi_platdata *plat,
/* Setup write address. */ reg = cadence_qspi_apb_cmd2addr(&cmdbuf[1], addr_bytes);
- writel(reg, plat->regbase + CQSPI_REG_INDIRECTWRSTARTADDR);
- writel((u32)plat->ahbbase + reg,
plat->regbase + CQSPI_REG_INDIRECTWRSTARTADDR);Please drop this (u32) cast, it's misleading and problematic.
ok, Thanks for pointing it out.
Rgds, Vikas
Best regards, Marek Vasut .