
On Thu, Jan 2, 2025 at 10:47 PM Alice Guo alice.guo@oss.nxp.com wrote:
From: Ye Li ye.li@nxp.com
This patch adds i.MX95 19x19 EVK board basic support.
Hi Alice,
Could you add in the commit log what is and/or what is not supported?
From what I see:
the following is supported: - gpio - pci - i2c - mmc
the following are not yet supported by this series: - ethernet - usb
Best Regards,
Tim
Signed-off-by: Ye Li ye.li@nxp.com Signed-off-by: Alice Guo alice.guo@nxp.com Reviewed-by: Peng Fan peng.fan@nxp.com
arch/arm/dts/imx95-19x19-evk-u-boot.dtsi | 68 ++++++++++ arch/arm/dts/imx95-u-boot.dtsi | 173 +++++++++++++++++++++++++ arch/arm/mach-imx/imx9/Kconfig | 6 + arch/arm/mach-imx/imx9/scmi/container.cfg | 10 ++ arch/arm/mach-imx/imx9/scmi/imximage.cfg | 15 +++ arch/arm/mach-imx/imx9/scmi/soc.c | 1 + board/freescale/imx95_evk/Kconfig | 12 ++ board/freescale/imx95_evk/MAINTAINERS | 6 + board/freescale/imx95_evk/Makefile | 11 ++ board/freescale/imx95_evk/imx95_19x19_evk.env | 90 +++++++++++++ board/freescale/imx95_evk/imx95_evk.c | 54 ++++++++ board/freescale/imx95_evk/spl.c | 96 ++++++++++++++ configs/imx95_19x19_evk_defconfig | 177 ++++++++++++++++++++++++++ doc/board/nxp/imx95_evk.rst | 116 +++++++++++++++++ doc/board/nxp/index.rst | 1 + include/configs/imx95_evk.h | 30 +++++ 16 files changed, 866 insertions(+)
diff --git a/arch/arm/dts/imx95-19x19-evk-u-boot.dtsi b/arch/arm/dts/imx95-19x19-evk-u-boot.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..36169b56ef3075a5c243f7fb1afd6399b0df77ad --- /dev/null +++ b/arch/arm/dts/imx95-19x19-evk-u-boot.dtsi @@ -0,0 +1,68 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*
- Copyright 2024 NXP
- */
+#include "imx95-u-boot.dtsi"
+&gpio1 {
reg = <0 0x47400000 0 0x1000>, <0 0x47400040 0 0x40>;
+};
+&lpuart1 {
clocks = <&scmi_clk IMX95_CLK_LPUART1>, <&scmi_clk IMX95_CLK_LPUART1>;
clock-names = "ipg", "per";
bootph-pre-ram;
+};
+&pinctrl_uart1 {
bootph-pre-ram;
+};
+&usdhc1 {
bootph-pre-ram;
+};
+&pinctrl_usdhc1 {
bootph-pre-ram;
+};
+&pinctrl_usdhc1_100mhz {
bootph-pre-ram;
+};
+&pinctrl_usdhc1_200mhz {
bootph-pre-ram;
+};
+&usdhc2 {
bootph-pre-ram;
+};
+&pinctrl_usdhc2 {
bootph-pre-ram;
+};
+&pinctrl_usdhc2_100mhz {
bootph-pre-ram;
+};
+&pinctrl_usdhc2_200mhz {
bootph-pre-ram;
+};
+&pinctrl_usdhc2_gpio {
bootph-pre-ram;
+};
+®_usdhc2_vmmc {
bootph-pre-ram;
+};
+&pinctrl_reg_usdhc2_vmmc {
bootph-pre-ram;
+};
+&wdog3 {
status = "disabled";
+}; diff --git a/arch/arm/dts/imx95-u-boot.dtsi b/arch/arm/dts/imx95-u-boot.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..bf6b31210e0d70674d6ce7c787ff7157a1cf65ed --- /dev/null +++ b/arch/arm/dts/imx95-u-boot.dtsi @@ -0,0 +1,173 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*
- Copyright 2024 NXP
- */
+/ {
- binman {
multiple-images;
m33-oei-ddrfw {
pad-byte = <0x00>;
align-size = <0x8>;
filename = "m33-oei-ddrfw.bin";
oei-m33-ddr {
align-size = <0x4>;
filename = "oei-m33-ddr.bin";
type = "blob-ext";
};
imx-lpddr {
type = "nxp-header-ddrfw";
imx-lpddr-imem {
filename = "lpddr5_imem_v202311.bin";
type = "blob-ext";
};
imx-lpddr-dmem {
filename = "lpddr5_dmem_v202311.bin";
type = "blob-ext";
};
};
imx-lpddr-qb {
type = "nxp-header-ddrfw";
imx-lpddr-imem-qb {
filename = "lpddr5_imem_qb_v202311.bin";
type = "blob-ext";
};
imx-lpddr-dmem-qb {
filename = "lpddr5_dmem_qb_v202311.bin";
type = "blob-ext";
};
};
};
imx-boot {
filename = "flash.bin";
pad-byte = <0x00>;
spl {
align = <0x400>;
align-size = <0x400>;
type = "mkimage";
args = "-n spl/u-boot-spl.cfgout -T imx8image";
};
u-boot {
type = "mkimage";
args = "-n u-boot-container.cfgout -T imx8image";
};
};
};
+};
+&{/soc} {
bootph-all;
bootph-pre-ram;
+};
+&aips1 {
bootph-all;
bootph-pre-ram;
+};
+&aips2 {
bootph-all;
bootph-pre-ram;
+};
+&aips3 {
bootph-pre-ram;
+};
+&gpio2 {
reg = <0 0x43810000 0 0x1000>, <0 0x43810040 0 0x40>;
bootph-pre-ram;
+};
+&gpio3 {
reg = <0 0x43820000 0 0x1000>, <0 0x43820040 0 0x40>;
bootph-pre-ram;
+};
+&gpio4 {
reg = <0 0x43840000 0 0x1000>, <0 0x43840040 0 0x40>;
bootph-pre-ram;
+};
+&gpio5 {
reg = <0 0x43850000 0 0x1000>, <0 0x43850040 0 0x40>;
bootph-pre-ram;
+};
+&osc_24m {
bootph-all;
bootph-pre-ram;
+};
+&clk_ext1 {
bootph-all;
bootph-pre-ram;
+};
+&mu2 {
bootph-all;
bootph-pre-ram;
+};
+&sram0 {
bootph-all;
bootph-pre-ram;
+};
+&scmi_buf0 {
bootph-all;
bootph-pre-ram;
+};
+&scmi_buf1 {
bootph-all;
bootph-pre-ram;
+};
+&{/firmware} {
bootph-all;
bootph-pre-ram;
+};
+&{/firmware/scmi} {
bootph-all;
bootph-pre-ram;
+};
+&{/firmware/scmi/protocol@11} {
bootph-all;
bootph-pre-ram;
+};
+&{/firmware/scmi/protocol@13} {
bootph-all;
bootph-pre-ram;
+};
+&{/firmware/scmi/protocol@14} {
bootph-all;
bootph-pre-ram;
+};
+&{/firmware/scmi/protocol@19} {
bootph-all;
bootph-pre-ram;
+};
+&elemu3 {
compatible = "fsl,imx93-mu-s4";
status = "okay";
bootph-all;
bootph-pre-ram;
+}; diff --git a/arch/arm/mach-imx/imx9/Kconfig b/arch/arm/mach-imx/imx9/Kconfig index 596e753f2897c11d7ca3bcc9211af786d005bfd9..1ba277baeb353de301a1e67a7adf70f281752ded 100644 --- a/arch/arm/mach-imx/imx9/Kconfig +++ b/arch/arm/mach-imx/imx9/Kconfig @@ -66,6 +66,11 @@ config TARGET_PHYCORE_IMX93 select OF_BOARD_FIXUP select OF_BOARD_SETUP
+config TARGET_IMX95_19X19_EVK
bool "imx95_19x19_evk"
select IMX95
imply OF_UPSTREAM
endchoice
source "board/freescale/imx91_evk/Kconfig" @@ -73,6 +78,7 @@ source "board/freescale/imx93_evk/Kconfig" source "board/freescale/imx93_qsb/Kconfig" source "board/phytec/phycore_imx93/Kconfig" source "board/variscite/imx93_var_som/Kconfig" +source "board/freescale/imx95_evk/Kconfig"
endif
diff --git a/arch/arm/mach-imx/imx9/scmi/container.cfg b/arch/arm/mach-imx/imx9/scmi/container.cfg new file mode 100644 index 0000000000000000000000000000000000000000..29f346e59c4afd0c2689667abe36f4b776b29ba8 --- /dev/null +++ b/arch/arm/mach-imx/imx9/scmi/container.cfg @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/*
- Copyright 2024 NXP
- */
+BOOT_FROM SD +SOC_TYPE IMX9 +CONTAINER +IMAGE A55 bl31.bin 0x8a200000 +IMAGE A55 u-boot.bin CONFIG_TEXT_BASE \ No newline at end of file diff --git a/arch/arm/mach-imx/imx9/scmi/imximage.cfg b/arch/arm/mach-imx/imx9/scmi/imximage.cfg new file mode 100644 index 0000000000000000000000000000000000000000..c90432f5efa78dccb2c67e237b88a96174446b96 --- /dev/null +++ b/arch/arm/mach-imx/imx9/scmi/imximage.cfg @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/*
- Copyright 2024 NXP
- */
+BOOT_FROM SD +SOC_TYPE IMX9 +APPEND mx95a0-ahab-container.img +CONTAINER +IMAGE OEI m33-oei-ddrfw.bin 0x1ffc0000 +HOLD 0x10000 +IMAGE OEI oei-m33-tcm.bin 0x1ffc0000 +IMAGE M33 m33_image.bin 0x1ffc0000 +IMAGE A55 spl/u-boot-spl.bin 0x20480000 +DUMMY_V2X 0x8b000000 \ No newline at end of file diff --git a/arch/arm/mach-imx/imx9/scmi/soc.c b/arch/arm/mach-imx/imx9/scmi/soc.c index 8a7df24afecc1d6d77b7162be639b56af95fd975..38ade99964b64512ba93423efcaa0cfb58094b00 100644 --- a/arch/arm/mach-imx/imx9/scmi/soc.c +++ b/arch/arm/mach-imx/imx9/scmi/soc.c @@ -43,6 +43,7 @@ #endif #include <spl.h> #include <mmc.h> +#include <asm/arch/mu.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/freescale/imx95_evk/Kconfig b/board/freescale/imx95_evk/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..f9a67353e5db6d3ec94784cf091e45d8817d541c --- /dev/null +++ b/board/freescale/imx95_evk/Kconfig @@ -0,0 +1,12 @@ +if TARGET_IMX95_19X19_EVK
+config SYS_BOARD
default "imx95_evk"
+config SYS_VENDOR
default "freescale"
+config SYS_CONFIG_NAME
default "imx95_evk"
+endif diff --git a/board/freescale/imx95_evk/MAINTAINERS b/board/freescale/imx95_evk/MAINTAINERS new file mode 100644 index 0000000000000000000000000000000000000000..5caf763e0cc390c46fc54ee627bc966b2b110958 --- /dev/null +++ b/board/freescale/imx95_evk/MAINTAINERS @@ -0,0 +1,6 @@ +i.MX95 EVK BOARD +M: Alice Guo alice.guo@nxp.com +S: Maintained +F: board/freescale/imx95_evk/ +F: include/configs/imx95_evk.h +F: configs/imx95_19x19_evk_defconfig diff --git a/board/freescale/imx95_evk/Makefile b/board/freescale/imx95_evk/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..a278d58ee0085176948b812703d120aaad3a3116 --- /dev/null +++ b/board/freescale/imx95_evk/Makefile @@ -0,0 +1,11 @@ +# +# Copyright 2024 NXP +# +# SPDX-License-Identifier: GPL-2.0+ +#
+obj-y += imx95_evk.o
+ifdef CONFIG_SPL_BUILD +obj-y += spl.o +endif diff --git a/board/freescale/imx95_evk/imx95_19x19_evk.env b/board/freescale/imx95_evk/imx95_19x19_evk.env new file mode 100644 index 0000000000000000000000000000000000000000..8d2b5dfcf07d251c77440bae44d62bff6253dfc7 --- /dev/null +++ b/board/freescale/imx95_evk/imx95_19x19_evk.env @@ -0,0 +1,90 @@ +sec_boot=no +initrd_addr=0x93800000 +emmc_dev=0 +sd_dev=1 +scriptaddr=0x93500000 +kernel_addr_r=CONFIG_SYS_LOAD_ADDR +image=Image +splashimage=0xA0000000 +console=ttyLP0,115200 earlycon +fdt_addr_r=0x93000000 +fdt_addr=0x93000000 +cntr_addr=0xA8000000 +cntr_file=os_cntr_signed.bin +boot_fit=no +fdtfile=CONFIG_DEFAULT_FDT_FILE +bootm_size=0x10000000 +mmcautodetect=yes +mmcargs=setenv bootargs console=${console} root=${mmcroot} +loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script}; +bootscript=echo Running bootscript from mmc ...; source +loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image} +loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile} +loadcntr=fatload mmc ${mmcdev}:${mmcpart} ${cntr_addr} ${cntr_file} +auth_os=auth_cntr ${cntr_addr} +boot_os=booti ${loadaddr} - ${fdt_addr_r}; +mmcboot=echo Booting from mmc ...;
run mmcargs;
if test ${sec_boot} = yes; then
if run auth_os; then
run boot_os;
else
echo ERR: failed to authenticate;
fi;
else
if test ${boot_fit} = yes || test ${boot_fit} = try; then
bootm ${loadaddr};
else
if run loadfdt; then
run boot_os;
else
echo WARN: Cannot load the DT;
fi;
fi;
fi;
+netargs=setenv bootargs console=${console} root=/dev/nfs
ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp
+netboot=echo Booting from net ...;
run netargs;
if test ${ip_dyn} = yes; then
setenv get_cmd dhcp;
else
setenv get_cmd tftp;
fi;
if test ${sec_boot} = yes; then
${get_cmd} ${cntr_addr} ${cntr_file};
if run auth_os; then
run boot_os;
else
echo ERR: failed to authenticate;
fi;
else
${get_cmd} ${loadaddr} ${image};
if test ${boot_fit} = yes || test ${boot_fit} = try; then
bootm ${loadaddr};
else
if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then
run boot_os;
else
echo WARN: Cannot load the DT;
fi;
fi;
fi;
+bsp_bootcmd=echo Running BSP bootcmd ...;
mmc dev ${mmcdev}; if mmc rescan; then
if run loadbootscript; then
run bootscript;
else
if test ${sec_boot} = yes; then
if run loadcntr; then
run mmcboot;
else run netboot;
fi;
else
if run loadimage; then
run mmcboot;
else run netboot;
fi;
fi;
fi;
fi;
\ No newline at end of file diff --git a/board/freescale/imx95_evk/imx95_evk.c b/board/freescale/imx95_evk/imx95_evk.c new file mode 100644 index 0000000000000000000000000000000000000000..c75a8f2450288a34cfc01150d3c42b07f2215491 --- /dev/null +++ b/board/freescale/imx95_evk/imx95_evk.c @@ -0,0 +1,54 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*
- Copyright 2024 NXP
- */
+#include <env.h> +#include <init.h> +#include <asm/global_data.h> +#include <asm/arch-imx9/ccm_regs.h> +#include <asm/arch/clock.h> +#include <fdt_support.h> +#include <asm/io.h> +#include <linux/bitfield.h> +#include <linux/bitops.h> +#include <linux/delay.h> +#include <miiphy.h> +#include <netdev.h> +#include <asm/gpio.h> +#include <asm/mach-imx/sys_proto.h> +#include <scmi_agent.h> +#include <scmi_protocols.h> +#include "../../../dts/upstream/src/arm64/freescale/imx95-clock.h" +#include "../../../dts/upstream/src/arm64/freescale/imx95-power.h"
+DECLARE_GLOBAL_DATA_PTR;
+int board_early_init_f(void) +{
/* UART1: A55, UART2: M33, UART3: M7 */
init_uart_clk(0);
return 0;
+}
+int board_init(void) +{
return 0;
+}
+int board_late_init(void) +{ +#ifdef CONFIG_ENV_IS_IN_MMC
board_late_mmc_env_init();
+#endif
return 0;
+}
+int board_phys_sdram_size(phys_size_t *size) +{
*size = PHYS_SDRAM_SIZE + PHYS_SDRAM_2_SIZE;
return 0;
+} diff --git a/board/freescale/imx95_evk/spl.c b/board/freescale/imx95_evk/spl.c new file mode 100644 index 0000000000000000000000000000000000000000..54f56c8049876fde335485a5c3bd54dff6e4f730 --- /dev/null +++ b/board/freescale/imx95_evk/spl.c @@ -0,0 +1,96 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*
- Copyright 2024 NXP
- */
+#include <command.h> +#include <cpu_func.h> +#include <clk.h> +#include <hang.h> +#include <image.h> +#include <init.h> +#include <log.h> +#include <spl.h> +#include <asm/global_data.h> +#include <asm/io.h> +#include <asm/arch/clock.h> +#include <asm/arch/sys_proto.h> +#include <asm/mach-imx/boot_mode.h> +#include <asm/mach-imx/syscounter.h> +#include <asm/mach-imx/ele_api.h> +#include <asm/sections.h> +#include <dm/uclass.h> +#include <dm/device.h> +#include <dm/uclass-internal.h> +#include <dm/device-internal.h> +#include <linux/delay.h> +#include <linux/iopoll.h> +#include <asm/arch/clock.h> +#include <asm/arch/ccm_regs.h> +#ifdef CONFIG_SCMI_FIRMWARE +#include <scmi_agent.h> +#include <scmi_protocols.h> +#include "../../../dts/upstream/src/arm64/freescale/imx95-clock.h" +#include "../../../dts/upstream/src/arm64/freescale/imx95-power.h" +#endif +#include <asm/arch/mu.h>
+DECLARE_GLOBAL_DATA_PTR;
+int spl_board_boot_device(enum boot_device boot_dev_spl) +{
switch (boot_dev_spl) {
case SD1_BOOT:
case MMC1_BOOT:
return BOOT_DEVICE_MMC1;
case SD2_BOOT:
case MMC2_BOOT:
return BOOT_DEVICE_MMC2;
case USB_BOOT:
return BOOT_DEVICE_BOARD;
default:
return BOOT_DEVICE_NONE;
}
+}
+void spl_board_init(void) +{
puts("Normal Boot\n");
+}
+void board_init_f(ulong dummy) +{
int ret;
/* Clear the BSS. */
memset(__bss_start, 0, __bss_end - __bss_start);
+#ifdef CONFIG_SPL_RECOVER_DATA_SECTION
if (IS_ENABLED(CONFIG_SPL_BUILD))
spl_save_restore_data();
+#endif
timer_init();
/* Need dm_init() to run before any SCMI calls can be made. */
spl_early_init();
/* Need enable SCMI drivers and ELE driver before enabling console */
ret = imx9_probe_mu();
if (ret)
hang(); /* if MU not probed, nothing can output, just hang here */
arch_cpu_init();
board_early_init_f();
preloader_console_init();
debug("SOC: 0x%x\n", gd->arch.soc_rev);
debug("LC: 0x%x\n", gd->arch.lifecycle);
/* Will set ARM freq to max rate */
clock_init_late();
board_init_r(NULL, 0);
+} diff --git a/configs/imx95_19x19_evk_defconfig b/configs/imx95_19x19_evk_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..4d6b194528e7f3124e6626b28be0d6344758f6e5 --- /dev/null +++ b/configs/imx95_19x19_evk_defconfig @@ -0,0 +1,177 @@ +CONFIG_ARM=y +CONFIG_ARCH_IMX9=y +CONFIG_TEXT_BASE=0x90200000 +CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_SYS_MALLOC_F_LEN=0x10000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=3 +CONFIG_ENV_SIZE=0x4000 +CONFIG_ENV_OFFSET=0x700000 +CONFIG_ENV_SECT_SIZE=0x10000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="freescale/imx95-19x19-evk" +CONFIG_SPL_TEXT_BASE=0x20480000 +CONFIG_TARGET_IMX95_19X19_EVK=y +CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_SPL_SERIAL=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x204d6000 +CONFIG_SPL=y +CONFIG_SPL_LOAD_IMX_CONTAINER=y +CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/scmi/imximage.cfg" +CONFIG_IMX_CONTAINER_CFG="arch/arm/mach-imx/imx9/scmi/container.cfg" +CONFIG_SYS_LOAD_ADDR=0x90400000 +CONFIG_SYS_MEMTEST_START=0x90000000 +CONFIG_SYS_MEMTEST_END=0xA0000000 +CONFIG_REMAKE_ELF=y +CONFIG_SYS_MONITOR_LEN=524288 +CONFIG_DEFAULT_FDT_FILE="imx95-19x19-evk.dtb" +CONFIG_ARCH_MISC_INIT=y +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_MAX_SIZE=0x20000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x204d6000 +CONFIG_SPL_BSS_MAX_SIZE=0x2000 +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_MMC=y +CONFIG_SPL_GPIO=y +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_SYS_MALLOC=y +CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y +CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x93200000 +CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 +CONFIG_SPL_SYS_MMCSD_RAW_MODE=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1040 +CONFIG_SPL_POWER=y +CONFIG_SDP_LOADADDR=0x90400000 +CONFIG_SPL_WATCHDOG=y +CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_CBSIZE=2048 +CONFIG_SYS_PBSIZE=2074 +CONFIG_CMD_ERASEENV=y +CONFIG_CMD_NVEDIT_EFI=y +CONFIG_CMD_CRC32=y +CONFIG_CRC32_VERIFY=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_CLK=y +CONFIG_CMD_DFU=y +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +CONFIG_CMD_POWEROFF=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_SNTP=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EFIDEBUG=y +CONFIG_CMD_RTC=y +CONFIG_CMD_TIME=y +CONFIG_CMD_GETTIME=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_HASH=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_NOWHERE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_DEV=1 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eth0" +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM=y +CONFIG_REGMAP=y +CONFIG_SYSCON=y +CONFIG_DFU_MMC=y +CONFIG_DFU_RAM=y +CONFIG_IMX_RGPIO2P=y +CONFIG_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_DM_SPI=y +CONFIG_NXP_FSPI=y +CONFIG_SPI=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_MT35XU=y +CONFIG_SF_DEFAULT_BUS=0 +CONFIG_SF_DEFAULT_SPEED=40000000 +CONFIG_DM_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_IMX_LPI2C=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_ES_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_FSL_USDHC=y +CONFIG_PHY=y +CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_SPL_DM_REGULATOR=y +CONFIG_SPL_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_RTC=y +CONFIG_DM_SERIAL=y +CONFIG_FSL_LPUART=y +CONFIG_ULP_WATCHDOG=y +CONFIG_LZO=y +CONFIG_BZIP2=y +CONFIG_HUSH_PARSER=y +CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_OF_SYSTEM_SETUP=y +CONFIG_ADP5585_GPIO=y +CONFIG_SPL_I2C=y +CONFIG_POWER_DOMAIN=y +# SCMI options +CONFIG_DM_MAILBOX=y +CONFIG_SCMI_FIRMWARE=y +CONFIG_SCMI_AGENT_SMCCC=n +CONFIG_CLK_SCMI=y +CONFIG_CLK=y +CONFIG_SPL_CLK_SCMI=y +CONFIG_SPL_CLK=y +CONFIG_PINCTRL_IMX_SCMI=y +CONFIG_SCMI_POWER_DOMAIN=y +CONFIG_SPL_DM_MAILBOX=y +CONFIG_SPL_FIRMWARE=y +#CONFIG_SPL_POWER_DOMAIN=y +CONFIG_SPL_IMX_MU_MBOX=y +CONFIG_IMX_MU_MBOX=y +#CONFIG_REMOTEPROC_SCMI_LMM=y +#CONFIG_CMD_REMOTEPROC=y +# CONFIG_RESET_SCMI=y +# CONFIG_DM_REGULATOR_SCMI=y +CONFIG_SPL_OF_TRANSLATE=y +CONFIG_PCI=y +CONFIG_PCIE_ECAM_GENERIC=y +CONFIG_PCI_SCAN_SHOW=y +CONFIG_CMD_PCI=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_PHYLIB=y +CONFIG_PHYLIB_10G=y +CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_REALTEK=y +CONFIG_FSL_ENETC=y +CONFIG_SYS_RX_ETH_BUFFER=8 +CONFIG_IMX8_ROMAPI=n +CONFIG_CLK_CCF=y +CONFIG_SPL_CLK_CCF=y +CONFIG_SPL_RECOVER_DATA_SECTION=y +CONFIG_ENV_SOURCE_FILE="imx95_19x19_evk" diff --git a/doc/board/nxp/imx95_evk.rst b/doc/board/nxp/imx95_evk.rst new file mode 100644 index 0000000000000000000000000000000000000000..132c45ed485148366533ee31485a4d5a41556eb0 --- /dev/null +++ b/doc/board/nxp/imx95_evk.rst @@ -0,0 +1,116 @@ +.. SPDX-License-Identifier: GPL-2.0+
+imx95_evk +=======================
+U-Boot for the NXP i.MX95 19x19 EVK board
+Quick Start +-----------
+- Get ahab-container.img +- Get DDR PHY Firmware Images +- Get and Build OEI Images +- Get and Build System Manager Image +- Get and Build the ARM Trusted Firmware +- Build the Bootloader Image +- Boot
+Get ahab-container.img +--------------------------------------
+Note: srctree is U-Boot source directory
+.. code-block:: bash
- $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-ele-imx-1.3.0-17945fc.bin
- $ chmod +x firmware-ele-imx-1.3.0-17945fc.bin
- $ ./firmware-ele-imx-1.3.0-17945fc.bin
- $ cp firmware-ele-imx-1.3.0-17945fc/mx95a0-ahab-container.img $(srctree)
+Get DDR PHY Firmware Images +--------------------------------------
+Note: srctree is U-Boot source directory
+.. code-block:: bash
- $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.26-d4c33ab.bin
- $ chmod +x firmware-imx-8.26-d4c33ab.bin
- $ ./firmware-imx-8.26-d4c33ab.bin
- $ cp firmware-imx-8.26-d4c33ab/firmware/ddr/synopsys/lpddr5*v202311.bin $(srctree)
+Get and Build OEI Images +--------------------------------------
+Note: srctree is U-Boot source directory +Get OEI from: https://github.com/nxp-imx/imx-oei +branch: master
+.. code-block:: bash
- $ sudo apt -y install make gcc g++-multilib srecord
- $ wget https://developer.arm.com/-/media/Files/downloads/gnu/13.3.rel1/binrel/arm-g...
- $ tar xvf arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi.tar.xz
- $ export TOOLS=$PWD
- $ git clone -b master https://github.com/nxp-imx/imx-oei.git
- $ cd imx-oei
- $ make board=mx95lp5 oei=ddr DEBUG=1
- $ cp build/mx95lp5/ddr/oei-m33-ddr.bin $(srctree)
- $ make board=mx95lp5 oei=tcm DEBUG=1
- $ cp build/mx95lp5/tcm/oei-m33-tcm.bin $(srctree)
+Get and Build System Manager Image +--------------------------------------
+Note: srctree is U-Boot source directory +Get System Manager from: https://github.com/nxp-imx/imx-sm +branch: master
+.. code-block:: bash
- $ sudo apt -y install make gcc g++-multilib srecord
- $ wget https://developer.arm.com/-/media/Files/downloads/gnu/13.3.rel1/binrel/arm-g...
- $ tar xvf arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi.tar.xz
- $ export TOOLS=$PWD
- $ git clone -b master https://github.com/nxp-imx/imx-sm.git
- $ cd imx-sm
- $ make config=mx95evk all
- $ cp build/mx95evk/m33_image.bin $(srctree)
+Get and Build the ARM Trusted Firmware +--------------------------------------
+Note: srctree is U-Boot source directory +Get ATF from: https://github.com/nxp-imx/imx-atf/ +branch: lf_v2.10
+.. code-block:: bash
- $ export CROSS_COMPILE=aarch64-poky-linux-
- $ unset LDFLAGS
- $ git clone -b lf_v2.10 https://github.com/nxp-imx/imx-atf.git
- $ cd imx-atf
- $ make PLAT=imx95 bl31
- $ cp build/imx95/release/bl31.bin $(srctree)
+Build the Bootloader Image +------------
+.. code-block:: bash
- $ export CROSS_COMPILE=aarch64-poky-linux-
- $ make imx95_19x19_evk_defconfig
- $ make
+Copy imx-boot-imx95.bin to the MicroSD card:
+.. code-block:: bash
- $ sudo dd if=flash.bin of=/dev/sd[x] bs=1k seek=32 conv=fsync
+Boot +----
+Set i.MX95 boot device to MicroSD card diff --git a/doc/board/nxp/index.rst b/doc/board/nxp/index.rst index 8ca4b5619863f616dbedc7eb0ff8a286a3fbbf48..e7ec725cc04e9755ba3dac37561c26ebc3f1c716 100644 --- a/doc/board/nxp/index.rst +++ b/doc/board/nxp/index.rst @@ -15,6 +15,7 @@ NXP Semiconductors imx91_11x11_evk imx93_9x9_qsb imx93_11x11_evk
- imx95_evk imxrt1020-evk imxrt1050-evk imxrt1170-evk
diff --git a/include/configs/imx95_evk.h b/include/configs/imx95_evk.h new file mode 100644 index 0000000000000000000000000000000000000000..00909a043a71751684ebd8dc413b05d5aee8dd69 --- /dev/null +++ b/include/configs/imx95_evk.h @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/*
- Copyright 2024 NXP
- */
+#ifndef __IMX95_EVK_H +#define __IMX95_EVK_H
+#include <linux/sizes.h> +#include <linux/stringify.h> +#include <asm/arch/imx-regs.h>
+#define CFG_SYS_UBOOT_BASE \
(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
+#define CFG_SYS_INIT_RAM_ADDR 0x90000000 +#define CFG_SYS_INIT_RAM_SIZE 0x200000
+#define CFG_SYS_SDRAM_BASE 0x90000000 +#define PHYS_SDRAM 0x90000000 +/* Totally 16GB */ +#define PHYS_SDRAM_SIZE 0x70000000 /* 2GB - 256MB DDR */ +#define PHYS_SDRAM_2_SIZE 0x380000000 /* 14GB */
+#define CFG_SYS_FSL_USDHC_NUM 2
+/* Using ULP WDOG for reset */ +#define WDOG_BASE_ADDR WDG3_BASE_ADDR
+#endif
-- 2.34.1