Wolfgang Denk wrote:
In message 431DB954.9030803@smiths-aerospace.com you wrote:
- Freescale seems to have stopped providing unfettered access to the
BSDL (Boundary Scan Description Language) interface to their processors. For instance, the MPC8260 is not in the list: http://www.freescale.com/webapp/sps/site/overview.jsp?nodeId=0162468rH3bTdGZj9NtRjM
We were never able to pass their NDA roadblocks when we asked for the necessary information to extend the BDM4GDB adapter for 82xx... :-(
Slightly different question, different answer ;-). The BSDL is describing the processor I/O ring shift register, allowing the JTAG to wiggle pins. What you are referring to is the COP (?) debugger interface which is also accessed via JTAG but is proprietary. The BSDL _is_ available as Rune pointed out. This allows you to program memory (very slowly) by shifting an {address, data, chip select}, toggle the write line, repeat ad nausium.
Note that you have to be careful with wiggling pins via JTAG: if you inadvertantly set two pins that are connected together to be "output" and set them to fighting, one of them will lose (generally the processor). I would never do that, but know someone who did ;-).
[snip]
Best regards, Wolfgang Denk
Thanks, gvb