At present SPL is used on 64-bit platforms, to allow SPL to be built as a 32-bit program and U-Boot proper to be built as 64-bit.
However it is useful to be able to use SPL on any x86 platform, where U-Boot needs to be updated in the field. Then SPL can select which U-Boot to run (A or B) and most of the code can be updated. Similarly, using TPL allows both SPL and U-Boot to be updated. This is the best approach, since it means that all of U-Boot proper as well as SPL (in particular SDRAM init) can be updated in the field. This provides for the smallest possible amount of read-only (non-updateable) code: just the TPL code.
This series contains a number of changes to allow x86 boards to use TPL, SPL and U-Boot proper. As a test, it is enabled for samus with a new chromebook_samus_tpl board.
Changes in v4: - Update commit message to not mention the sysreset driver. - Drop change to SPI flash memory-map property
Changes in v3: - Remove unneeded pch-reset node
Changes in v2: - Sort defconfig and adjust it to build after rebase on maste
Simon Glass (4): x86: samus: Update device tree for SPL x86: samus: Update device tree for verified boot Revert "pci: Scale MAX_PCI_REGIONS based on CONFIG_NR_DRAM_BANKS" x86: samus: Add a target to boot through TPL
arch/x86/dts/chromebook_samus.dts | 53 +++++++++++++-- board/google/Kconfig | 8 +++ board/google/chromebook_samus/Kconfig | 14 +++- board/google/chromebook_samus/MAINTAINERS | 7 ++ configs/chromebook_samus_tpl_defconfig | 82 +++++++++++++++++++++++ include/configs/chromebook_samus.h | 2 + include/pci.h | 6 +- 7 files changed, 161 insertions(+), 11 deletions(-) create mode 100644 configs/chromebook_samus_tpl_defconfig