Please, please, PLEASE someone tell me there's at least an 'unofficial' standard for this.. like a GMII standard or something similar (802.3ab??)? I'm familiar with the Marvell and Cicada code.. and having to write specific code for each phy, whose documentation may or may not be publically available is.. well, scary...
Phy register 0x0A looks promising.. does anyone know of a gigabit phy that doesn't support that register for 1000bT mode? specifically bits 10/11. (see a Cicada datasheet here: http://www.cicada-semi.com/products/lan/CIS8201/CIS8201_Data_Sheet_Rev_1_2_2...) I don't know about marvell (no docs).
Seems like we should be able to use those bits like the bits in register 0x5 for 10/100 modes... and my gut tells me that register is in a spec somwhere..
john.c
On Thu, 11 Mar 2004, Travis Sawyer wrote:
On Thu, 2004-03-11 at 11:02, Wolfgang Denk wrote:
In message 1079020123.17587.135.camel@pavement.sandburst.com you wrote:
Is anyone working on Gigabit Ethernet PHY support for u-boot?
What _exactly_ are you looking for?
The IBM 440GX supports GbE on the 2nd and 3rd ports, if a gigabit capable phy is in place that is.
The current miiphy_utils (specifically miiphy_speed and miiphy_duplex) read the phy autonegiotation link partner ability register (reg 0x05) to determine current link speed and duplex.
Register 5 is a standard IEEE802.3 register. However, in order to get 'true' status (10/100/1000), extended registers are needed.
In the case of the ocotea board, IBM placed a LXT9762 (6 port phy) for emac 0 and 1 (as they only support 10/100), and two (2) cicada CIS8201 phys for emac 2 and 3 (supports 10/100/1000).
The problem I see is that the extended register set may not be the same across the phy part spectrum. So, one would need to check the OUI and then go to the appropriate register for that part. Which, IMHO, would add quite a bit of code.
Perhaps for my application I should force 1000 Gbps off in the autonegotiation register...
-travis
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