Add defconfig for Diamond Mesa to support both legacy boot flow and ATF boot flow.
Legacy boot: SPL -> U-Boot proper -> OS (Linux)
ATF boot flow: SPL -> ATF(BL31) -> U-Boot proper -> OS (Linux)
Signed-off-by: Siew Chin Lim elly.siew.chin.lim@intel.com --- arch/arm/mach-socfpga/Kconfig | 18 ++++++++++ arch/arm/mach-socfpga/Makefile | 18 ++++++++++ configs/socfpga_dm_atf_defconfig | 75 ++++++++++++++++++++++++++++++++++++++++ configs/socfpga_dm_defconfig | 69 ++++++++++++++++++++++++++++++++++++ 4 files changed, 180 insertions(+) create mode 100644 configs/socfpga_dm_atf_defconfig create mode 100644 configs/socfpga_dm_defconfig
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index 9c8d5567d8..2258931e47 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -65,6 +65,21 @@ config TARGET_SOCFPGA_CYCLONE5 bool select TARGET_SOCFPGA_GEN5
+config TARGET_SOCFPGA_DM + bool + select TARGET_SOCFPGA_SOC64 + select ARMV8_MULTIENTRY + select ARMV8_SET_SMPEN + select CLK + select FPGA_INTEL_SDM_MAILBOX + select NCORE_CACHE + select SPL_ALTERA_SDRAM + select SPL_CLK if SPL + +config TARGET_SOCFPGA_DM_SOCDK + bool "Intel SOCFPGA SoCDK (Diamond Mesa)" + select TARGET_SOCFPGA_DM + config TARGET_SOCFPGA_GEN5 bool select SPL_ALTERA_SDRAM @@ -171,6 +186,7 @@ config SYS_BOARD default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO default "de1-soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC default "de10-nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO + default "dm-socdk" if TARGET_SOCFPGA_DM_SOCDK default "is1" if TARGET_SOCFPGA_IS1 default "mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK default "moritz_iii" if TARGET_SOCFPGA_ICA_MORITZ_III @@ -183,6 +199,7 @@ config SYS_BOARD
config SYS_VENDOR default "intel" if TARGET_SOCFPGA_AGILEX_SOCDK + default "intel" if TARGET_SOCFPGA_DM_SOCDK default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK default "altera" if TARGET_SOCFPGA_ARRIA10_SOCDK default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK @@ -211,6 +228,7 @@ config SYS_CONFIG_NAME default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO default "socfpga_de1_soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC default "socfpga_de10_nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO + default "socfpga_dm_socdk" if TARGET_SOCFPGA_DM_SOCDK default "socfpga_ica_moritz_iii" if TARGET_SOCFPGA_ICA_MORITZ_III default "socfpga_is1" if TARGET_SOCFPGA_IS1 default "socfpga_mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile index 57dc1e730d..b88bb515d0 100644 --- a/arch/arm/mach-socfpga/Makefile +++ b/arch/arm/mach-socfpga/Makefile @@ -54,6 +54,19 @@ obj-y += wrap_handoff_soc64.o obj-y += wrap_pll_config_soc64.o endif
+ifdef CONFIG_TARGET_SOCFPGA_DM +obj-y += clock_manager_dm.o +obj-y += lowlevel_init_soc64.o +obj-y += mailbox_s10.o +obj-y += misc_s10.o +obj-y += mmu-arm64_s10.o +obj-y += reset_manager_s10.o +obj-y += system_manager_soc64.o +obj-y += timer_s10.o +obj-y += wrap_handoff_soc64.o +obj-y += wrap_pll_config_soc64.o +endif + ifdef CONFIG_SPL_BUILD ifdef CONFIG_TARGET_SOCFPGA_GEN5 obj-y += spl_gen5.o @@ -75,6 +88,11 @@ obj-y += firewall.o obj-y += spl_agilex.o obj-y += spl_soc64.o endif +ifdef CONFIG_TARGET_SOCFPGA_DM +obj-y += firewall.o +obj-y += spl_dm.o +obj-y += spl_soc64.o +endif else obj-$(CONFIG_SPL_ATF) += smc_api.o endif diff --git a/configs/socfpga_dm_atf_defconfig b/configs/socfpga_dm_atf_defconfig new file mode 100644 index 0000000000..6effa897b3 --- /dev/null +++ b/configs/socfpga_dm_atf_defconfig @@ -0,0 +1,75 @@ +CONFIG_ARM=y +CONFIG_ARM_SMCCC=y +CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds" +CONFIG_ARCH_SOCFPGA=y +CONFIG_SYS_TEXT_BASE=0x200000 +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_ENV_SIZE=0x1000 +CONFIG_ENV_OFFSET=0x200 +CONFIG_DM_GPIO=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_TARGET_SOCFPGA_DM_SOCDK=y +CONFIG_IDENT_STRING="socfpga_dm" +CONFIG_SPL_FS_FAT=y +CONFIG_SPL_TEXT_BASE=0xFFE00000 +CONFIG_FIT=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_FIT_GENERATOR="board/altera/soc64/fit_spl_atf.sh" +CONFIG_BOOTDELAY=5 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="earlycon" +CONFIG_SPL_CACHE=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 +CONFIG_SPL_ATF=y +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="SOCFPGA_DM # " +CONFIG_CMD_MEMTEST=y +# CONFIG_CMD_GPIO is not set +# CONFIG_CMD_I2C is not set +CONFIG_CMD_MMC=y +# CONFIG_CMD_MTD is not set +CONFIG_CMD_SPI=y +# CONFIG_CMD_USB is not set +# CONFIG_CMD_DHCP is not set +# CONFIG_CMD_MII is not set +# CONFIG_CMD_PING is not set +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0" +CONFIG_DEFAULT_DEVICE_TREE="socfpga_dm_socdk" +CONFIG_ENV_IS_NOWHERE=y +# CONFIG_ENV_IS_IN_MMC is not set +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +# CONFIG_DWAPB_GPIO is not set +# CONFIG_DM_I2C is not set +# CONFIG_SYS_I2C_DW is not set +CONFIG_DM_MMC=y +CONFIG_MMC_DW=y +CONFIG_MTD=y +CONFIG_SF_DEFAULT_MODE=0x2003 +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y +CONFIG_DM_RESET=y +CONFIG_SPI=y +CONFIG_CADENCE_QSPI=y +CONFIG_DESIGNWARE_SPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_DWC2=y +CONFIG_USB_STORAGE=y +CONFIG_DESIGNWARE_WATCHDOG=y +CONFIG_WDT=y +# CONFIG_SPL_USE_TINY_PRINTF is not set +CONFIG_PANIC_HANG=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_BAUDRATE=4800 diff --git a/configs/socfpga_dm_defconfig b/configs/socfpga_dm_defconfig new file mode 100644 index 0000000000..d87f849c42 --- /dev/null +++ b/configs/socfpga_dm_defconfig @@ -0,0 +1,69 @@ +CONFIG_ARM=y +CONFIG_ARM_SMCCC=y +CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds" +CONFIG_ARCH_SOCFPGA=y +CONFIG_SYS_TEXT_BASE=0x1000 +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_ENV_SIZE=0x1000 +CONFIG_ENV_OFFSET=0x200 +CONFIG_DM_GPIO=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_TARGET_SOCFPGA_DM_SOCDK=y +CONFIG_IDENT_STRING="socfpga_dm" +CONFIG_SPL_FS_FAT=y +# CONFIG_PSCI_RESET is not set +CONFIG_SPL_TEXT_BASE=0xFFE00000 +CONFIG_BOOTDELAY=5 +CONFIG_SPL_CACHE=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000 +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="SOCFPGA_DM # " +CONFIG_CMD_MEMTEST=y +# CONFIG_CMD_GPIO is not set +# CONFIG_CMD_I2C is not set +CONFIG_CMD_MMC=y +# CONFIG_CMD_MTD is not set +CONFIG_CMD_SPI=y +# CONFIG_CMD_USB is not set +# CONFIG_CMD_DHCP is not set +# CONFIG_CMD_MII is not set +# CONFIG_CMD_PING is not set +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0" +CONFIG_DEFAULT_DEVICE_TREE="socfpga_dm_socdk" +CONFIG_ENV_IS_NOWHERE=y +# CONFIG_ENV_IS_IN_MMC is not set +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +# CONFIG_DWAPB_GPIO is not set +# CONFIG_DM_I2C is not set +# CONFIG_SYS_I2C_DW is not set +CONFIG_DM_MMC=y +CONFIG_MMC_DW=y +CONFIG_MTD=y +CONFIG_SF_DEFAULT_MODE=0x2003 +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y +CONFIG_DM_RESET=y +CONFIG_SPI=y +CONFIG_CADENCE_QSPI=y +CONFIG_DESIGNWARE_SPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_DWC2=y +CONFIG_USB_STORAGE=y +CONFIG_DESIGNWARE_WATCHDOG=y +CONFIG_WDT=y +# CONFIG_SPL_USE_TINY_PRINTF is not set +CONFIG_PANIC_HANG=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_BAUDRATE=4800