13 Apr
2011
13 Apr
'11
10:50 p.m.
Dear Kyle Moffett,
In message 1298478920-22044-1-git-send-email-Kyle.D.Moffett@boeing.com you wrote:
The current FreeScale MPC-8xxx DDR SPD interpreter is using full 64-bit integer divide operations to convert between nanoseconds and DDR clock cycles given arbitrary DDR clock frequencies.
...
+/* To avoid 64-bit full-divides, we factor this here */ +#define ULL_2e12 2000000000000ULL +#define UL_5pow12 244140625UL +#define UL_2pow13 (1UL << 13)
+#define ULL_8Fs 0xFFFFFFFFULL
We don't allow CamelCaps macro names. Macros are all caps, please.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
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- Wernher von Braun