Hi
This patch adds support for our new AVR32 based board.
diff -Nur old/u-boot-1.3.0/board/miromico/hammerhead/config.mk new/u-boot-1.3.0/board/miromico/hammerhead/config.mk --- old/u-boot-1.3.0/board/miromico/hammerhead/config.mk 1970-01-01 01:00:00.000000000 +0100 +++ new/u-boot-1.3.0/board/miromico/hammerhead/config.mk 2008-03-10 11:18:50.000000000 +0100 @@ -0,0 +1,3 @@ +TEXT_BASE = 0x00000000 +PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections +PLATFORM_LDFLAGS += --gc-sections diff -Nur old/u-boot-1.3.0/board/miromico/hammerhead/eth.c new/u-boot-1.3.0/board/miromico/hammerhead/eth.c --- old/u-boot-1.3.0/board/miromico/hammerhead/eth.c 1970-01-01 01:00:00.000000000 +0100 +++ new/u-boot-1.3.0/board/miromico/hammerhead/eth.c 2008-03-10 11:18:50.000000000 +0100 @@ -0,0 +1,35 @@ +/* + * Copyright (C) 2008 Miromico AG + * + * Ethernet initialization for the AVR32 on Hammerhead + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> + +#include <asm/arch/memory-map.h> + +extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); + +#ifdef CONFIG_CMD_NET +void hammerhead_eth_initialize(bd_t *bi) +{ + macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]); +} +#endif diff -Nur old/u-boot-1.3.0/board/miromico/hammerhead/flash.c new/u-boot-1.3.0/board/miromico/hammerhead/flash.c --- old/u-boot-1.3.0/board/miromico/hammerhead/flash.c 1970-01-01 01:00:00.000000000 +0100 +++ new/u-boot-1.3.0/board/miromico/hammerhead/flash.c 2008-03-10 11:18:50.000000000 +0100 @@ -0,0 +1,232 @@ +/* + * Copyright (C) 2008 Miromico AG + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> + +#ifdef CONFIG_HAMMERHEAD_EXT_FLASH +#include <asm/cacheflush.h> +#include <asm/io.h> +#include <asm/sections.h> + +DECLARE_GLOBAL_DATA_PTR; + +flash_info_t flash_info[1]; + +static void __flashprog flash_identify(uint16_t *flash, flash_info_t *info) +{ + unsigned long flags; + + flags = disable_interrupts(); + + dcache_flush_unlocked(); + + writew(0xaa, flash + 0x555); + writew(0x55, flash + 0xaaa); + writew(0x90, flash + 0x555); + info->flash_id = readl(flash); + writew(0xff, flash); + + readw(flash); + + if (flags) + enable_interrupts(); +} + +unsigned long flash_init(void) +{ + unsigned long addr; + unsigned int i; + + flash_info[0].size = CFG_FLASH_SIZE; + flash_info[0].sector_count = 135; + + flash_identify(uncached((void *)CFG_FLASH_BASE), &flash_info[0]); + + for (i = 0, addr = 0; i < 8; i++, addr += 0x2000) + flash_info[0].start[i] = addr; + for (; i < flash_info[0].sector_count; i++, addr += 0x10000) + flash_info[0].start[i] = addr; + + return CFG_FLASH_SIZE; +} + +void flash_print_info(flash_info_t *info) +{ + printf("Flash: Vendor ID: 0x%02x, Product ID: 0x%02x\n", + info->flash_id >> 16, info->flash_id & 0xffff); + printf("Size: %ld MB in %d sectors\n", + info->size >> 10, info->sector_count); +} + +int __flashprog flash_erase(flash_info_t *info, int s_first, int s_last) +{ + unsigned long flags; + unsigned long start_time; + uint16_t *fb, *sb; + unsigned int i; + int ret; + uint16_t status; + + if ((s_first < 0) || (s_first > s_last) + || (s_last >= info->sector_count)) { + puts("Error: first and/or last sector out of range\n"); + return ERR_INVAL; + } + + for (i = s_first; i < s_last; i++) + if (info->protect[i]) { + printf("Error: sector %d is protected\n", i); + return ERR_PROTECTED; + } + + fb = (uint16_t *)uncached(info->start[0]); + + dcache_flush_unlocked(); + + for (i = s_first; (i <= s_last) && !ctrlc(); i++) { + printf("Erasing sector %3d...", i); + + sb = (uint16_t *)uncached(info->start[i]); + + flags = disable_interrupts(); + + start_time = get_timer(0); + + /* Unlock sector */ + writew(0xaa, fb + 0x555); + writew(0x70, sb); + + /* Erase sector */ + writew(0xaa, fb + 0x555); + writew(0x55, fb + 0xaaa); + writew(0x80, fb + 0x555); + writew(0xaa, fb + 0x555); + writew(0x55, fb + 0xaaa); + writew(0x30, sb); + + /* Wait for completion */ + ret = ERR_OK; + do { + /* TODO: Timeout */ + status = readw(sb); + } while ((status != 0xffff) && !(status & 0x28)); + + writew(0xf0, fb); + + /* + * Make sure the command actually makes it to the bus + * before we re-enable interrupts. + */ + readw(fb); + + if (flags) + enable_interrupts(); + + if (status != 0xffff) { + printf("Flash erase error at address 0x%p: 0x%02x\n", + sb, status); + ret = ERR_PROG_ERROR; + break; + } + } + + if (ctrlc()) + printf("User interrupt!\n"); + + return ERR_OK; +} + +int __flashprog write_buff(flash_info_t *info, uchar *src, + ulong addr, ulong count) +{ + unsigned long flags; + uint16_t *base, *p, *s, *end; + uint16_t word, status, status1; + int ret = ERR_OK; + + if (addr < info->start[0] + || (addr + count) > (info->start[0] + info->size) + || (addr + count) < addr) { + puts("Error: invalid address range\n"); + return ERR_INVAL; + } + + if (addr & 1 || count & 1 || (unsigned int)src & 1) { + puts("Error: misaligned source, destination or count\n"); + return ERR_ALIGN; + } + + base = (uint16_t *)uncached(info->start[0]); + end = (uint16_t *)uncached(addr + count); + + flags = disable_interrupts(); + + dcache_flush_unlocked(); + sync_write_buffer(); + + for (p = (uint16_t *)uncached(addr), s = (uint16_t *)src; + p < end && !ctrlc(); p++, s++) { + word = *s; + + writew(0xaa, base + 0x555); + writew(0x55, base + 0xaaa); + writew(0xa0, base + 0x555); + writew(word, p); + + sync_write_buffer(); + + /* Wait for completion */ + status1 = readw(p); + do { + /* TODO: Timeout */ + status = status1; + status1 = readw(p); + } while (((status ^ status1) & 0x40) /* toggled */ + && !(status1 & 0x28)); /* error bits */ + + /* + * We'll need to check once again for toggle bit + * because the toggle bit may stop toggling as I/O5 + * changes to "1" (ref at49bv642.pdf p9) + */ + status1 = readw(p); + status = readw(p); + if ((status ^ status1) & 0x40) { + printf("Flash write error at address 0x%p: " + "0x%02x != 0x%02x\n", + p, status,word); + ret = ERR_PROG_ERROR; + writew(0xf0, base); + readw(base); + break; + } + + writew(0xf0, base); + readw(base); + } + + if (flags) + enable_interrupts(); + + return ret; +} + +#endif /* CONFIG_HAMMERHEAD_EXT_FLASH */ diff -Nur old/u-boot-1.3.0/board/miromico/hammerhead/hammerhead.c new/u-boot-1.3.0/board/miromico/hammerhead/hammerhead.c --- old/u-boot-1.3.0/board/miromico/hammerhead/hammerhead.c 1970-01-01 01:00:00.000000000 +0100 +++ new/u-boot-1.3.0/board/miromico/hammerhead/hammerhead.c 2008-03-10 11:18:50.000000000 +0100 @@ -0,0 +1,77 @@ +/* + * Copyright (C) 2008 Miromico AG + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> + +#include <asm/io.h> +#include <asm/sdram.h> +#include <asm/arch/gpio.h> +#include <asm/arch/hmatrix2.h> + +DECLARE_GLOBAL_DATA_PTR; + +static const struct sdram_info sdram = { + .phys_addr = CFG_SDRAM_BASE, + .row_bits = 13, + .col_bits = 9, + .bank_bits = 2, + .cas = 3, + .twr = 2, + .trc = 7, + .trp = 2, + .trcd = 2, + .tras = 5, + .txsr = 5, +}; + +int board_early_init_f(void) +{ + /* Set the SDRAM_ENABLE bit in the HEBI SFR */ + hmatrix2_writel(SFR4, 1 << 1); + + gpio_enable_ebi(); + gpio_enable_usart1(); + +#if defined(CONFIG_MACB) + gpio_enable_macb0(); +#endif +#if defined(CONFIG_MMC) + gpio_enable_mmci(); +#endif + +#ifdef CONFIG_HAMMERHEAD + /* Select GCLK3 as periph. We'll need it as clock + output for ethernet PHY */ + gpio_enable_gclk3(); +#endif + + return 0; +} + +long int initdram(int board_type) +{ + return sdram_init(&sdram); +} + +void board_init_info(void) +{ + gd->bd->bi_phy_id[0] = 0x01; +} diff -Nur old/u-boot-1.3.0/board/miromico/hammerhead/Makefile new/u-boot-1.3.0/board/miromico/hammerhead/Makefile --- old/u-boot-1.3.0/board/miromico/hammerhead/Makefile 1970-01-01 01:00:00.000000000 +0100 +++ new/u-boot-1.3.0/board/miromico/hammerhead/Makefile 2008-03-10 11:18:50.000000000 +0100 @@ -0,0 +1,40 @@ +# +# Copyright (C) 2005-2006 Atmel Corporation +# +# See file CREDITS for list of people who contributed to this project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA + +include $(TOPDIR)/config.mk + +LIB := $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o flash.o eth.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff -Nur old/u-boot-1.3.0/board/miromico/hammerhead/u-boot.lds new/u-boot-1.3.0/board/miromico/hammerhead/u-boot.lds --- old/u-boot-1.3.0/board/miromico/hammerhead/u-boot.lds 1970-01-01 01:00:00.000000000 +0100 +++ new/u-boot-1.3.0/board/miromico/hammerhead/u-boot.lds 2008-03-10 11:18:50.000000000 +0100 @@ -0,0 +1,80 @@ +/* -*- Fundamental -*- + * + * Copyright (C) 2005-2006 Atmel Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") +OUTPUT_ARCH(avr32) +ENTRY(_start) + +SECTIONS +{ + . = 0; + _text = .; + .text : { + *(.text) + *(.text.*) + } + + . = ALIGN(32); + __flashprog_start = .; + .flashprog : { + *(.flashprog) + } + . = ALIGN(32); + __flashprog_end = .; + _etext = .; + + .rodata : { + *(.rodata) + *(.rodata.*) + } + + . = ALIGN(8); + _data = .; + .data : { + *(.data) + *(.data.*) + } + + . = ALIGN(4); + __u_boot_cmd_start = .; + .u_boot_cmd : { + KEEP(*(.u_boot_cmd)) + } + __u_boot_cmd_end = .; + + . = ALIGN(4); + _got = .; + .got : { + *(.got) + } + _egot = .; + + . = ALIGN(8); + _edata = .; + + .bss : { + *(.bss) + *(.bss.*) + } + . = ALIGN(8); + _end = .; +} diff -Nur old/u-boot-1.3.0/cpu/at32ap/at32ap700x/gpio.c new/u-boot-1.3.0/cpu/at32ap/at32ap700x/gpio.c --- old/u-boot-1.3.0/cpu/at32ap/at32ap700x/gpio.c 2008-03-06 07:56:03.000000000 +0100 +++ new/u-boot-1.3.0/cpu/at32ap/at32ap700x/gpio.c 2008-03-10 11:18:51.000000000 +0100 @@ -142,3 +142,14 @@ gpio_select_periph_A(GPIO_PIN_PA15, 0); /* DATA3 */ } #endif + +#ifdef CONFIG_HAMMERHEAD +/* + * Hammerhead board uses GCLK3 (Periph A on PB29) as 25MHz clock output + * for ethernet PHY. + */ +void gpio_enable_gclk3(void) +{ + gpio_select_periph_A(GPIO_PIN_PB29, 0); /* GCLK3 */ +} +#endif diff -Nur old/u-boot-1.3.0/cpu/at32ap/cpu.c new/u-boot-1.3.0/cpu/at32ap/cpu.c --- old/u-boot-1.3.0/cpu/at32ap/cpu.c 2007-11-19 22:20:24.000000000 +0100 +++ new/u-boot-1.3.0/cpu/at32ap/cpu.c 2008-03-10 11:18:51.000000000 +0100 @@ -81,6 +81,16 @@ #endif }
+#ifdef CONFIG_HAMMERHEAD +static void gclk_init(void) +{ + /* Hammerhead boards uses GCLK3 as 25MHz output to ethernet PHY */ + + /* Enable GCLK3 with no input divider, from OSC0 (crystal) */ + sm_writel( PM_GCCTRL3, SM_BIT(CEN) ); +} +#endif + int cpu_init(void) { extern void _evba(void); @@ -105,6 +115,10 @@ p += CFG_ICACHE_LINESZ) asm volatile("cache %0, 0x02" : "=m"(*p) :: "memory");
+#ifdef CONFIG_HAMMERHEAD + gclk_init(); +#endif + return 0; }
diff -Nur old/u-boot-1.3.0/cpu/at32ap/sm.h new/u-boot-1.3.0/cpu/at32ap/sm.h --- old/u-boot-1.3.0/cpu/at32ap/sm.h 2007-11-19 22:20:24.000000000 +0100 +++ new/u-boot-1.3.0/cpu/at32ap/sm.h 2008-03-10 11:18:51.000000000 +0100 @@ -21,7 +21,15 @@ #define SM_PM_IMR 0x0048 #define SM_PM_ISR 0x004c #define SM_PM_ICR 0x0050 -#define SM_PM_GCCTRL 0x0060 +#define SM_PM_GCCTRL0 0x0060 +#define SM_PM_GCCTRL1 0x0064 +#define SM_PM_GCCTRL2 0x0068 +#define SM_PM_GCCTRL3 0x006c +#define SM_PM_GCCTRL4 0x0070 +#define SM_PM_GCCTRL5 0x0074 +#define SM_PM_GCCTRL6 0x0078 +#define SM_PM_GCCTRL7 0x007c + #define SM_RTC_CTRL 0x0080 #define SM_RTC_VAL 0x0084 #define SM_RTC_TOP 0x0088 diff -Nur old/u-boot-1.3.0/include/asm-avr32/arch-at32ap700x/gpio.h new/u-boot-1.3.0/include/asm-avr32/arch-at32ap700x/gpio.h --- old/u-boot-1.3.0/include/asm-avr32/arch-at32ap700x/gpio.h 2008-03-06 07:56:04.000000000 +0100 +++ new/u-boot-1.3.0/include/asm-avr32/arch-at32ap700x/gpio.h 2008-03-10 11:18:50.000000000 +0100 @@ -217,4 +217,8 @@ void gpio_enable_mmci(void); #endif
+#ifdef CONFIG_HAMMERHEAD +void gpio_enable_gclk3(void); +#endif + #endif /* __ASM_AVR32_ARCH_GPIO_H__ */ diff -Nur old/u-boot-1.3.0/include/configs/hammerhead.h new/u-boot-1.3.0/include/configs/hammerhead.h --- old/u-boot-1.3.0/include/configs/hammerhead.h 1970-01-01 01:00:00.000000000 +0100 +++ new/u-boot-1.3.0/include/configs/hammerhead.h 2008-03-10 11:18:50.000000000 +0100 @@ -0,0 +1,186 @@ +/* + * Copyright (C) 2006 Atmel Corporation + * + * Configuration settings for the AVR32 Network Gateway + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_AVR32 1 +#define CONFIG_AT32AP 1 +#define CONFIG_AT32AP7000 1 +#define CONFIG_HAMMERHEAD 1 + +#define CONFIG_HAMMERHEAD_EXT_FLASH 1 + +#define CFG_HZ 1000 + +/* + * Set up the PLL to run at 140 MHz, the CPU to run at the PLL + * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency + * and the PBA bus to run at 1/4 the PLL frequency. + */ +#define CONFIG_PLL 1 +#define CFG_POWER_MANAGER 1 +#define CFG_OSC0_HZ 25000000 /* 25MHz crystal */ +#define CFG_PLL0_DIV 1 +#define CFG_PLL0_MUL 5 +#define CFG_PLL0_SUPPRESS_CYCLES 16 +#define CFG_CLKDIV_CPU 0 +#define CFG_CLKDIV_HSB 1 +#define CFG_CLKDIV_PBA 2 +#define CFG_CLKDIV_PBB 1 + +/* + * The PLLOPT register controls the PLL like this: + * icp = PLLOPT<2> + * ivco = PLLOPT<1:0> + * + * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz). + */ +#define CFG_PLL0_OPT 0x04 + +#define CONFIG_USART1 1 + +/* User serviceable stuff */ +#define CONFIG_DOS_PARTITION 1 + +#define CONFIG_CMDLINE_TAG 1 +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +#define CONFIG_STACKSIZE (2048) + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_BOOTARGS \ + "console=ttyS0 root=/dev/mtdblock1 rootfstype=jffs2" +#define CONFIG_BOOTCOMMAND \ + "fsload; bootm" + +/* + * Only interrupt autoboot if <space> is pressed. Otherwise, garbage + * data on the serial line may interrupt the boot sequence. + */ +#define CONFIG_BOOTDELAY 1 +#define CONFIG_AUTOBOOT 1 +#define CONFIG_AUTOBOOT_KEYED 1 +#define CONFIG_AUTOBOOT_PROMPT \ + "Press SPACE to abort autoboot in %d seconds\n" +#define CONFIG_AUTOBOOT_DELAY_STR "d" +#define CONFIG_AUTOBOOT_STOP_STR " " + +/* + * After booting the board for the first time, new ethernet addresse + * should be generated and assigned to the environment variables + * "ethaddr". This is normally done during production. + */ +#define CONFIG_OVERWRITE_ETHADDR_ONCE 1 +#define CONFIG_NET_MULTI 1 + +/* + * BOOTP/DHCP options + */ +#define CONFIG_BOOTP_SUBNETMASK +#define CONFIG_BOOTP_GATEWAY + +#define CONFIG_DOS_PARTITION 1 + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_MMC +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_SETGETDCR + +#define CONFIG_ATMEL_USART 1 +#define CONFIG_MACB 1 +#define CONFIG_PIO2 1 +#define CFG_NR_PIOS 5 +#define CFG_HSDRAMC 1 +#define CONFIG_MMC 1 + +#define CFG_DCACHE_LINESZ 32 +#define CFG_ICACHE_LINESZ 32 + +#define CONFIG_NR_DRAM_BANKS 1 + +#define CFG_FLASH_BASE 0x00000000 +#define CFG_FLASH_SIZE 0x800000 +#define CFG_MAX_FLASH_BANKS 1 +#define CFG_MAX_FLASH_SECT 135 + +#define CFG_MONITOR_BASE CFG_FLASH_BASE + +#define CFG_INTRAM_BASE 0x24000000 +#define CFG_INTRAM_SIZE 0x8000 + +#define CFG_SDRAM_BASE 0x10000000 + +#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_ENV_SIZE 65536 +#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_FLASH_SIZE - CFG_ENV_SIZE) + +#define CFG_INIT_SP_ADDR (CFG_INTRAM_BASE + CFG_INTRAM_SIZE) + +#define CFG_MALLOC_LEN (256*1024) +#define CFG_MALLOC_END \ + ({ \ + DECLARE_GLOBAL_DATA_PTR; \ + CFG_SDRAM_BASE + gd->sdram_size; \ + }) +#define CFG_MALLOC_START (CFG_MALLOC_END - CFG_MALLOC_LEN) + +#define CFG_DMA_ALLOC_LEN (16384) + +/* Allow 4MB for the kernel run-time image */ +#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 0x00400000) +#define CFG_BOOTPARAMS_LEN (16 * 1024) + +/* Other configuration settings that shouldn't have to change all that often */ +#define CFG_PROMPT "Uboot> " +#define CFG_CBSIZE 256 +#define CFG_MAXARGS 16 +#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) +#define CFG_LONGHELP 1 + +#define CFG_MEMTEST_START CFG_SDRAM_BASE +#define CFG_MEMTEST_END (CFG_MEMTEST_START + 0x1f00000) + +#define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } + +#endif /* __CONFIG_H */ + +/* Add a wrapper around the values Buildroot sets. */ +#ifndef __BR2_ADDED_CONFIG_H +#define __BR2_ADDED_CONFIG_H +#define CONFIG_HOSTNAME hammerhead +#undef CONFIG_BOOTARGS +#define CONFIG_BOOTARGS "console=ttyS0 root=/dev/mtdblock1 rootfstype=jffs2" +#undef CONFIG_BOOTCOMMAND +#define CONFIG_BOOTCOMMAND "fsload 0x90300000 /boot/uImage; bootm" +#endif /* __BR2_ADDED_CONFIG_H */ diff -Nur old/u-boot-1.3.0/MAINTAINERS new/u-boot-1.3.0/MAINTAINERS --- old/u-boot-1.3.0/MAINTAINERS 2008-03-06 07:56:03.000000000 +0100 +++ new/u-boot-1.3.0/MAINTAINERS 2008-03-10 11:18:50.000000000 +0100 @@ -636,6 +636,9 @@ ATSTK1004 AT32AP7002 ATNGW100 AT32AP7000
+Alex Raimondi alex.raimondi@miromico.ch + HAMMERHEAD AT32AP7000 + ######################################################################### # End of MAINTAINERS list # ######################################################################### diff -Nur old/u-boot-1.3.0/MAKEALL new/u-boot-1.3.0/MAKEALL --- old/u-boot-1.3.0/MAKEALL 2008-03-06 07:56:03.000000000 +0100 +++ new/u-boot-1.3.0/MAKEALL 2008-03-10 11:18:50.000000000 +0100 @@ -644,6 +644,7 @@ atstk1003 \ atstk1004 \ atngw100 \ + hammerhead \ "
######################################################################### diff -Nur old/u-boot-1.3.0/Makefile new/u-boot-1.3.0/Makefile --- old/u-boot-1.3.0/Makefile 2008-03-06 07:56:03.000000000 +0100 +++ new/u-boot-1.3.0/Makefile 2008-03-10 11:18:50.000000000 +0100 @@ -2618,6 +2618,9 @@ atngw100_config : unconfig @$(MKCONFIG) $(@:_config=) avr32 at32ap atngw100 atmel at32ap700x
+hammerhead_config : unconfig + @$(MKCONFIG) $(@:_config=) avr32 at32ap hammerhead miromico at32ap700x + ######################################################################### ######################################################################### ######################################################################### diff -Nur old/u-boot-1.3.0/net/eth.c new/u-boot-1.3.0/net/eth.c --- old/u-boot-1.3.0/net/eth.c 2008-03-06 07:56:04.000000000 +0100 +++ new/u-boot-1.3.0/net/eth.c 2008-03-10 11:18:50.000000000 +0100 @@ -61,6 +61,7 @@ extern int bfin_EMAC_initialize(bd_t *); extern int atstk1000_eth_initialize(bd_t *); extern int atngw100_eth_initialize(bd_t *); +extern int hammerhead_eth_initialize(bd_t *); extern int mcffec_initialize(bd_t*);
static struct eth_device *eth_devices, *eth_current; @@ -258,6 +259,9 @@ #if defined(CONFIG_ATNGW100) atngw100_eth_initialize(bis); #endif +#if defined(CONFIG_HAMMERHEAD) + hammerhead_eth_initialize(bis); +#endif #if defined(CONFIG_MCFFEC) mcffec_initialize(bis); #endif @@ -522,6 +526,7 @@ extern int mcf52x2_miiphy_initialize(bd_t *bis); extern int ns7520_miiphy_initialize(bd_t *bis); extern int dm644x_eth_miiphy_initialize(bd_t *bis); +extern int hammerhead_eth_initialize(bd_t *);
int eth_initialize(bd_t *bis) @@ -546,6 +551,9 @@ #if defined(CONFIG_DRIVER_TI_EMAC) dm644x_eth_miiphy_initialize(bis); #endif +#if defined(CONFIG_HAMMERHEAD) + hammerhead_eth_initialize(bis); +#endif return 0; } #endif