-----Original Message----- From: york sun Sent: Tuesday, October 25, 2016 12:15 AM To: Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; Pratiyush Srivastava pratiyush.srivastava@nxp.com; u-boot@lists.denx.de; Mingkai Hu mingkai.hu@nxp.com Cc: Hou Zhiqiang Zhiqiang.Hou@freescale.com Subject: Re: [PATCH] armv8/ls1043a: Add the OCRAM initialization
On 10/23/2016 06:59 AM, Prabhakar Kushwaha wrote:
Hi York,
-----Original Message----- From: york sun Sent: Saturday, October 22, 2016 1:39 AM To: Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; Pratiyush Srivastava pratiyush.srivastava@nxp.com; u-boot@lists.denx.de; Mingkai Hu mingkai.hu@nxp.com Cc: Hou Zhiqiang Zhiqiang.Hou@freescale.com Subject: Re: [PATCH] armv8/ls1043a: Add the OCRAM initialization
On 10/16/2016 10:35 PM, Prabhakar Kushwaha wrote:
Hi Mingkai,
-----Original Message----- From: Pratiyush Srivastava [mailto:pratiyush.srivastava@nxp.com] Sent: Wednesday, October 12, 2016 5:46 PM To: u-boot@lists.denx.de Cc: york sun york.sun@nxp.com; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; Pratiyush Srivastava pratiyush.srivastava@nxp.com; Hou Zhiqiang
Subject: [PATCH] armv8/ls1043a: Add the OCRAM initialization
Clear the content to zero and the ECC error bit of OCRAM1/2.
The OCRAM must be initialized to ZERO by the unit of 8-Byte before accessing it, or else it will generate ECC error. And the IBR has accessed the OCRAM before this initialization, so the ECC error status bit should to be cleared.
Signed-off-by: Pratiyush Srivastava pratiyush.srivastava@nxp.com Signed-off-by: Hou Zhiqiang Zhiqiang.Hou@freescale.com Signed-off-by: Prabhakar Kushwaha prabhakar.kushwaha@nxp.com
This requirement is for both ls1043 and ls1088a. was this patch taken care
during ls1043a upstreaming
If not, how it is being taken care for ls1043a. Same approach can be used for
ls1088a
I wonder why we don't see ECC errors before this patch. We have LS1043A boots on NAND, SD.
OCRAM has a requirement of initializing before first time "read". If user reads OCRAM before **initializing**; ECC error will come. (u-boot is
not handling this error for now).
I can only guess the reason of not seeing this error as OCRAM never read
before any write.
Even in case of Stack, data is first written and then read.
Is there a case you want to read from OCRAM before writing anything to it? Why don't we need to do so for SPL or LSCH3?
Hi York,
For secure boot case, the bootrom uses the OCRAM as workspace but does not Cleare the after the using, which will trigger this issue.
Thanks, Mingkai