On 03/13/2012 07:18 AM, Fabio Estevam wrote:
Instead of hardcoding the mx6 silicon revision, read it from the proper register.
Signed-off-by: Fabio Estevamfabio.estevam@freescale.com
Changes since v1:
- Fix typo on Subject arch/arm/cpu/armv7/mx6/soc.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 2ac74b5..639bf30 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -32,7 +32,8 @@
u32 get_cpu_rev(void) {
- int system_rev = 0x61000 | CHIP_REV_1_0;
int reg = readl(ANATOP_BASE_ADDR + 0x260)& 0xFF;
int system_rev = 0x61000 | 0x10 + reg;
return system_rev; }
Nice! MX6Q SABRELITE U-Boot > md 0x20C8260 1 020c8260: 00630000 ..c.
This beats the heck out of my hack: http://lists.denx.de/pipermail/u-boot/2012-March/120102.html
Now the question is how get_cpu_rev() relates to get_board_rev().
We had a discussion a while back about reserving some space in OTP to allow per-board revision information.
Fabio, do you have any guidance about how/whether the system_rev should be updated to include a board revision?
Please advise,
Eric