On Thu, Jan 30, 2020 at 12:57 AM Masahiro Yamada yamada.masahiro@socionext.com wrote:
Now that the reset controlling of the Denali NAND driver (denali_dt.c) works for this platform, remove the adhoc reset deassert code.
Signed-off-by: Masahiro Yamada yamada.masahiro@socionext.com
Applied to u-boot-uniphier.
Changes in v2:
- more clean-up
arch/arm/mach-uniphier/board_init.c | 2 -- arch/arm/mach-uniphier/clk/Makefile | 4 ++-- arch/arm/mach-uniphier/clk/clk-ld4.c | 32 --------------------------- arch/arm/mach-uniphier/clk/clk-pro4.c | 14 ++---------- arch/arm/mach-uniphier/clk/clk-pro5.c | 14 ++---------- arch/arm/mach-uniphier/clk/clk-pxs2.c | 14 ++---------- arch/arm/mach-uniphier/init.h | 1 - 7 files changed, 8 insertions(+), 73 deletions(-) delete mode 100644 arch/arm/mach-uniphier/clk/clk-ld4.c
diff --git a/arch/arm/mach-uniphier/board_init.c b/arch/arm/mach-uniphier/board_init.c index 7535f91528..99727a3004 100644 --- a/arch/arm/mach-uniphier/board_init.c +++ b/arch/arm/mach-uniphier/board_init.c @@ -40,7 +40,6 @@ static const struct uniphier_initdata uniphier_initdata[] = { .soc_id = UNIPHIER_LD4_ID, .sbc_init = uniphier_ld4_sbc_init, .pll_init = uniphier_ld4_pll_init,
.clk_init = uniphier_ld4_clk_init, },#endif #if defined(CONFIG_ARCH_UNIPHIER_PRO4) @@ -56,7 +55,6 @@ static const struct uniphier_initdata uniphier_initdata[] = { .soc_id = UNIPHIER_SLD8_ID, .sbc_init = uniphier_ld4_sbc_init, .pll_init = uniphier_ld4_pll_init,
.clk_init = uniphier_ld4_clk_init, },#endif #if defined(CONFIG_ARCH_UNIPHIER_PRO5) diff --git a/arch/arm/mach-uniphier/clk/Makefile b/arch/arm/mach-uniphier/clk/Makefile index d12f49e523..c49e44754c 100644 --- a/arch/arm/mach-uniphier/clk/Makefile +++ b/arch/arm/mach-uniphier/clk/Makefile @@ -11,9 +11,9 @@ obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-early-ld4.o clk-dram-pxs2.o dpll-pxs2.o
else
-obj-$(CONFIG_ARCH_UNIPHIER_LD4) += clk-ld4.o pll-ld4.o dpll-tail.o +obj-$(CONFIG_ARCH_UNIPHIER_LD4) += pll-ld4.o dpll-tail.o obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += clk-pro4.o pll-pro4.o dpll-tail.o -obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += clk-ld4.o pll-ld4.o dpll-tail.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += pll-ld4.o dpll-tail.o obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += clk-pro5.o obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += clk-pxs2.o obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-pxs2.o diff --git a/arch/arm/mach-uniphier/clk/clk-ld4.c b/arch/arm/mach-uniphier/clk/clk-ld4.c deleted file mode 100644 index 0393942503..0000000000 --- a/arch/arm/mach-uniphier/clk/clk-ld4.c +++ /dev/null @@ -1,32 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/*
- Copyright (C) 2011-2015 Panasonic Corporation
- Copyright (C) 2015-2016 Socionext Inc.
- Author: Masahiro Yamada yamada.masahiro@socionext.com
- */
-#include <linux/io.h>
-#include "../init.h" -#include "../sc-regs.h"
-void uniphier_ld4_clk_init(void) -{
u32 tmp;/* deassert reset */tmp = readl(sc_base + SC_RSTCTRL);-#ifdef CONFIG_NAND_DENALI
tmp |= SC_RSTCTRL_NRST_NAND;-#endif
writel(tmp, sc_base + SC_RSTCTRL);readl(sc_base + SC_RSTCTRL); /* dummy read *//* provide clocks */tmp = readl(sc_base + SC_CLKCTRL);-#ifdef CONFIG_NAND_DENALI
tmp |= SC_CLKCTRL_CEN_NAND;-#endif
writel(tmp, sc_base + SC_CLKCTRL);readl(sc_base + SC_CLKCTRL); /* dummy read */-} diff --git a/arch/arm/mach-uniphier/clk/clk-pro4.c b/arch/arm/mach-uniphier/clk/clk-pro4.c index 2b364dca41..798128b302 100644 --- a/arch/arm/mach-uniphier/clk/clk-pro4.c +++ b/arch/arm/mach-uniphier/clk/clk-pro4.c @@ -12,36 +12,26 @@
void uniphier_pro4_clk_init(void) { +#ifdef CONFIG_USB_DWC3_UNIPHIER u32 tmp;
/* deassert reset */ tmp = readl(sc_base + SC_RSTCTRL);-#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_USB3C0 | SC_RSTCTRL_NRST_GIO; -#endif -#ifdef CONFIG_NAND_DENALI
tmp |= SC_RSTCTRL_NRST_NAND;-#endif writel(tmp, sc_base + SC_RSTCTRL); readl(sc_base + SC_RSTCTRL); /* dummy read */
-#ifdef CONFIG_USB_DWC3_UNIPHIER tmp = readl(sc_base + SC_RSTCTRL2); tmp |= SC_RSTCTRL2_NRST_USB3B1 | SC_RSTCTRL2_NRST_USB3C1; writel(tmp, sc_base + SC_RSTCTRL2); readl(sc_base + SC_RSTCTRL2); /* dummy read */ -#endif
/* provide clocks */ tmp = readl(sc_base + SC_CLKCTRL);-#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | SC_CLKCTRL_CEN_GIO; -#endif -#ifdef CONFIG_NAND_DENALI
tmp |= SC_CLKCTRL_CEN_NAND;-#endif writel(tmp, sc_base + SC_CLKCTRL); readl(sc_base + SC_CLKCTRL); /* dummy read */ +#endif } diff --git a/arch/arm/mach-uniphier/clk/clk-pro5.c b/arch/arm/mach-uniphier/clk/clk-pro5.c index 874964b2d5..36006fd256 100644 --- a/arch/arm/mach-uniphier/clk/clk-pro5.c +++ b/arch/arm/mach-uniphier/clk/clk-pro5.c @@ -10,35 +10,25 @@
void uniphier_pro5_clk_init(void) { +#ifdef CONFIG_USB_DWC3_UNIPHIER u32 tmp;
/* deassert reset */ tmp = readl(sc_base + SC_RSTCTRL);-#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO; -#endif -#ifdef CONFIG_NAND_DENALI
tmp |= SC_RSTCTRL_NRST_NAND;-#endif writel(tmp, sc_base + SC_RSTCTRL); readl(sc_base + SC_RSTCTRL); /* dummy read */
-#ifdef CONFIG_USB_DWC3_UNIPHIER tmp = readl(sc_base + SC_RSTCTRL2); tmp |= SC_RSTCTRL2_NRST_USB3B1; writel(tmp, sc_base + SC_RSTCTRL2); readl(sc_base + SC_RSTCTRL2); /* dummy read */ -#endif
/* provide clocks */ tmp = readl(sc_base + SC_CLKCTRL);-#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | SC_CLKCTRL_CEN_GIO; -#endif -#ifdef CONFIG_NAND_DENALI
tmp |= SC_CLKCTRL_CEN_NAND;-#endif writel(tmp, sc_base + SC_CLKCTRL); readl(sc_base + SC_CLKCTRL); /* dummy read */ +#endif } diff --git a/arch/arm/mach-uniphier/clk/clk-pxs2.c b/arch/arm/mach-uniphier/clk/clk-pxs2.c index 8cb4f87ae5..c2a75ce000 100644 --- a/arch/arm/mach-uniphier/clk/clk-pxs2.c +++ b/arch/arm/mach-uniphier/clk/clk-pxs2.c @@ -11,20 +11,15 @@
void uniphier_pxs2_clk_init(void) { +#ifdef CONFIG_USB_DWC3_UNIPHIER u32 tmp;
/* deassert reset */ tmp = readl(sc_base + SC_RSTCTRL);-#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO; -#endif -#ifdef CONFIG_NAND_DENALI
tmp |= SC_RSTCTRL_NRST_NAND;-#endif writel(tmp, sc_base + SC_RSTCTRL); readl(sc_base + SC_RSTCTRL); /* dummy read */
-#ifdef CONFIG_USB_DWC3_UNIPHIER tmp = readl(sc_base + SC_RSTCTRL2); tmp |= SC_RSTCTRL2_NRST_USB3B1; writel(tmp, sc_base + SC_RSTCTRL2); @@ -33,17 +28,12 @@ void uniphier_pxs2_clk_init(void) tmp = readl(sc_base + SC_RSTCTRL6); tmp |= 0x37; writel(tmp, sc_base + SC_RSTCTRL6); -#endif
/* provide clocks */ tmp = readl(sc_base + SC_CLKCTRL);-#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= BIT(20) | BIT(19) | SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | SC_CLKCTRL_CEN_GIO; -#endif -#ifdef CONFIG_NAND_DENALI
tmp |= SC_CLKCTRL_CEN_NAND;-#endif writel(tmp, sc_base + SC_CLKCTRL); readl(sc_base + SC_CLKCTRL); /* dummy read */ +#endif } diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h index b37ab2fa50..9dc5b885a5 100644 --- a/arch/arm/mach-uniphier/init.h +++ b/arch/arm/mach-uniphier/init.h @@ -90,7 +90,6 @@ void uniphier_ld11_pll_init(void); void uniphier_ld20_pll_init(void); void uniphier_pxs3_pll_init(void);
-void uniphier_ld4_clk_init(void); void uniphier_pro4_clk_init(void); void uniphier_pro5_clk_init(void); void uniphier_pxs2_clk_init(void); -- 2.17.1