Trivial fix.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
doc/README.arm-caches | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/doc/README.arm-caches b/doc/README.arm-caches index f6a52e3e386c..dbb6190b95c0 100644 --- a/doc/README.arm-caches +++ b/doc/README.arm-caches @@ -47,7 +47,7 @@ Cleanup Before Linux: - cleanup_before_linux() should flush the D-cache, invalidate I-cache, and disable MMU and caches. - The following sequence is advisable while disabling d-cache: - 1. disable_dcache() - flushes and disables d-cache + 1. dcache_disable() - flushes and disables d-cache 2. invalidate_dcache_all() - invalid any entry that came to the cache in the short period after the cache was flushed but before the cache got disabled. -- 1.8.2.3