On Sunday, July 20, 2014 at 12:12:58 AM, Pavel Machek wrote:
On Sun 2014-07-20 00:06:59, Marek Vasut wrote:
On Saturday, July 19, 2014 at 11:57:59 PM, Pavel Machek wrote:
Structure defining clock manager hardware was wrong, leading to wrong registers being accessed and hang in MMC init.
This fixes structure to match hardware.
Signed-off-by: Pavel Machek pavel@denx.de
diff --git a/arch/arm/cpu/armv7/socfpga/clock_manager.c b/arch/arm/cpu/armv7/socfpga/clock_manager.c index 23d697d..0228ac8 100644 --- a/arch/arm/cpu/armv7/socfpga/clock_manager.c +++ b/arch/arm/cpu/armv7/socfpga/clock_manager.c @@ -110,8 +110,8 @@ void cm_basic_init(const cm_config_t *cfg)
* gatting off the rest of the periperal clocks. */writel(~CLKMGR_PERPLLGRP_EN_NANDCLK_MASK &
readl(&clock_manager_base->per_pll_en),&clock_manager_base->per_pll_en);
readl(&clock_manager_base->per_pll.en),&clock_manager_base->per_pll.en);clrbits_le32() please ... and please fix globally. [...]
But that's clearly something for separate patch, so I'd still like your ack on this one :-). Pavel
I cannot ACK a patch for hardware which I don't understand enough. Still, you're already messing with the register layout, feel free to do a two-part patchset, but please use the clrsetbits_le32() ...
Best regards, Marek Vasut