This is 7th version of patchset to add Intel Agilex SoC[1] support.
This patchset needs to apply after patchset in [2] for manager driver struct to defines conversion and [3] for enable cache driver build in SPL.
Patch status: Have changes: Patch 17, 19 Other patches unchanged.
Detail changelog can find in commit message.
Intel Agilex SoC is with a 64-bit quad core ARM Cortex-A53 MPCore hard processor system (HPS). New IPs in Agilex are CCU, clock manager and SDRAM, other IPs have minor changes compared to Stratix 10.
Intel Agilex HPS TRM: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/...
v6->v7: ------- Patch 17: - Update socfpga_agilex.dtsi and socfpga_agilex_socdk.dts from Linux. - Add new socfpga_agilex_socdk-u-boot.dts file for Uboot specific DT properties. Patch 19: - Move CONFIG_DW_WDT_CLOCK_KHZ to _soc64_common.h - Use fdtimage filename from CONFIG_DEFAULT_DEVICE_TREE
History: --------- [v1]: https://patchwork.ozlabs.org/cover/1097830/ [v2]: https://patchwork.ozlabs.org/cover/1127440/ [v3]: https://patchwork.ozlabs.org/cover/1149863/ [v4]: https://patchwork.ozlabs.org/cover/1161483/ [v5]: https://patchwork.ozlabs.org/cover/1175076/ [v6]: https://patchwork.ozlabs.org/cover/1191577/
[1]: https://www.intel.com/content/www/us/en/products/programmable/fpga/agilex.ht... [2]: https://patchwork.ozlabs.org/cover/1191562/ ("arm: socfpga: Convert drivers from struct to defines") [3]: https://patchwork.ozlabs.org/patch/1191569/ ("spl: Allow cache drivers to be used in SPL")
Ley Foon Tan (19): arm: socfpga: agilex: Add base address for Intel Agilex SoC arm: socfpga: Move firewall code to firewall file arm: socfpga: Move Stratix10 and Agilex reset manager common code arm: socfpga: agilex: Add reset manager support arm: socfpga: Move Stratix10 and Agilex system manager common code arm: socfpga: agilex: Add system manager support arm: socfpga: Move Stratix10 and Agilex clock manager common code arm: socfpga: Fix CLKMGR_INTOSC_HZ to 400MHz clk: agilex: Add clock driver for Agilex arm: socfpga: agilex: Add clock wrapper functions cache: Add Arteris Ncore cache coherent unit driver arm: agilex: Add clock handoff offset for Agilex ddr: altera: Restructure Stratix 10 SDRAM driver ddr: altera: agilex: Add SDRAM driver for Agilex board: intel: agilex: Add socdk board support for Intel Agilex SoC arm: socfpga: agilex: Add SPL for Agilex SoC arm: dts: agilex: Add base dtsi and devkit dts configs: socfpga: Move Stratix10 and Agilex common CONFIGs arm: socfpga: agilex: Enable Agilex SoC build
arch/arm/Kconfig | 4 +- arch/arm/dts/Makefile | 1 + arch/arm/dts/socfpga_agilex-u-boot.dtsi | 96 +++ arch/arm/dts/socfpga_agilex.dtsi | 622 ++++++++++++++++++ arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi | 37 ++ arch/arm/dts/socfpga_agilex_socdk.dts | 142 ++++ arch/arm/mach-socfpga/Kconfig | 16 + arch/arm/mach-socfpga/Makefile | 17 + arch/arm/mach-socfpga/clock_manager_agilex.c | 85 +++ arch/arm/mach-socfpga/clock_manager_s10.c | 3 +- .../mach-socfpga/{spl_s10.c => firewall.c} | 122 +--- .../mach-socfpga/include/mach/base_addr_s10.h | 4 + .../mach-socfpga/include/mach/clock_manager.h | 2 + .../include/mach/clock_manager_agilex.h | 14 + .../include/mach/clock_manager_s10.h | 16 +- .../include/mach/clock_manager_soc64.h | 21 + .../mach/{firewall_s10.h => firewall.h} | 10 +- .../mach-socfpga/include/mach/handoff_s10.h | 9 +- .../mach-socfpga/include/mach/reset_manager.h | 5 +- .../include/mach/reset_manager_s10.h | 95 --- .../include/mach/reset_manager_soc64.h | 38 ++ .../include/mach/system_manager.h | 5 +- .../include/mach/system_manager_s10.h | 124 ---- .../include/mach/system_manager_soc64.h | 123 ++++ arch/arm/mach-socfpga/mailbox_s10.c | 2 +- arch/arm/mach-socfpga/misc.c | 5 + arch/arm/mach-socfpga/misc_s10.c | 2 +- arch/arm/mach-socfpga/reset_manager_s10.c | 35 +- arch/arm/mach-socfpga/spl_agilex.c | 98 +++ arch/arm/mach-socfpga/spl_s10.c | 95 +-- arch/arm/mach-socfpga/system_manager_s10.c | 26 +- arch/arm/mach-socfpga/wrap_pll_config_s10.c | 15 +- board/intel/agilex-socdk/MAINTAINERS | 7 + board/intel/agilex-socdk/Makefile | 7 + board/intel/agilex-socdk/socfpga.c | 7 + configs/socfpga_agilex_defconfig | 60 ++ drivers/cache/Kconfig | 8 + drivers/cache/Makefile | 1 + drivers/cache/cache-ncore.c | 164 +++++ drivers/clk/altera/Makefile | 1 + drivers/clk/altera/clk-agilex.c | 579 ++++++++++++++++ drivers/clk/altera/clk-agilex.h | 237 +++++++ drivers/ddr/altera/Kconfig | 6 +- drivers/ddr/altera/Makefile | 3 +- drivers/ddr/altera/sdram_agilex.c | 168 +++++ drivers/ddr/altera/sdram_s10.c | 298 +-------- drivers/ddr/altera/sdram_s10.h | 148 +---- drivers/ddr/altera/sdram_soc64.c | 304 +++++++++ .../ddr/altera/{sdram_s10.h => sdram_soc64.h} | 71 +- include/configs/socfpga_agilex_socdk.h | 12 + ...ratix10_socdk.h => socfpga_soc64_common.h} | 14 +- include/configs/socfpga_stratix10_socdk.h | 193 +----- include/dt-bindings/clock/agilex-clock.h | 71 ++ 53 files changed, 3090 insertions(+), 1158 deletions(-) create mode 100644 arch/arm/dts/socfpga_agilex-u-boot.dtsi create mode 100644 arch/arm/dts/socfpga_agilex.dtsi create mode 100644 arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi create mode 100644 arch/arm/dts/socfpga_agilex_socdk.dts create mode 100644 arch/arm/mach-socfpga/clock_manager_agilex.c copy arch/arm/mach-socfpga/{spl_s10.c => firewall.c} (53%) create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_agilex.h create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_soc64.h rename arch/arm/mach-socfpga/include/mach/{firewall_s10.h => firewall.h} (94%) delete mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_soc64.h delete mode 100644 arch/arm/mach-socfpga/include/mach/system_manager_s10.h create mode 100644 arch/arm/mach-socfpga/include/mach/system_manager_soc64.h create mode 100644 arch/arm/mach-socfpga/spl_agilex.c create mode 100644 board/intel/agilex-socdk/MAINTAINERS create mode 100644 board/intel/agilex-socdk/Makefile create mode 100644 board/intel/agilex-socdk/socfpga.c create mode 100644 configs/socfpga_agilex_defconfig create mode 100644 drivers/cache/cache-ncore.c create mode 100644 drivers/clk/altera/clk-agilex.c create mode 100644 drivers/clk/altera/clk-agilex.h create mode 100644 drivers/ddr/altera/sdram_agilex.c create mode 100644 drivers/ddr/altera/sdram_soc64.c copy drivers/ddr/altera/{sdram_s10.h => sdram_soc64.h} (79%) create mode 100644 include/configs/socfpga_agilex_socdk.h copy include/configs/{socfpga_stratix10_socdk.h => socfpga_soc64_common.h} (94%) create mode 100644 include/dt-bindings/clock/agilex-clock.h