From: Dirk Eibach eibach@gdsys.de
Signed-off-by: Dirk Eibach dirk.eibach@gdsys.cc --- Changes in v2: None
board/gdsys/405ep/405ep.c | 12 +++---- board/gdsys/common/osd.c | 70 +++++++++++++++++++++----------------------- 2 files changed, 38 insertions(+), 44 deletions(-)
diff --git a/board/gdsys/405ep/405ep.c b/board/gdsys/405ep/405ep.c index 6221171..e5fbd2e 100644 --- a/board/gdsys/405ep/405ep.c +++ b/board/gdsys/405ep/405ep.c @@ -106,22 +106,20 @@ int board_early_init_r(void) gd405ep_set_fpga_reset(0);
for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) { - struct ihs_fpga *fpga = - (struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(k); #ifdef CONFIG_SYS_FPGA_NO_RFL_HI - u16 *reflection_target = &fpga->reflection_low; + u16 reflection_target = REG(reflection_low); #else - u16 *reflection_target = &fpga->reflection_high; + u16 reflection_target = REG(reflection_high); #endif /* * wait for fpga out of reset */ ctr = 0; while (1) { - out_le16(&fpga->reflection_low, - REFLECTION_TESTPATTERN); + fpga_set_reg(k, REG(reflection_low), + REFLECTION_TESTPATTERN);
- if (in_le16(reflection_target) == + if (fpga_get_reg(k, reflection_target) == REFLECTION_TESTPATTERN_INV) break;
diff --git a/board/gdsys/common/osd.c b/board/gdsys/common/osd.c index a192c98..81c8136 100644 --- a/board/gdsys/common/osd.c +++ b/board/gdsys/common/osd.c @@ -22,7 +22,7 @@ */
#include <common.h> -#include <i2c.h> +#include "bb_i2c.h" #include <asm/io.h>
#include <gdsys_fpga.h> @@ -67,37 +67,34 @@ enum { CH7301_DSP = 0x56, /* DVI Sync polarity Register */ };
+unsigned int max_osd_screen = CONFIG_SYS_OSD_SCREENS - 1; + #if defined(CONFIG_SYS_ICS8N3QV01) || defined(CONFIG_SYS_SIL1178) static void fpga_iic_write(unsigned screen, u8 slave, u8 reg, u8 data) { - struct ihs_fpga *fpga = (struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(screen); - struct ihs_i2c *i2c = &fpga->i2c; - - while (in_le16(&fpga->extended_interrupt) & (1 << 12)) + while (fpga_get_reg(screen, REG(extended_interrupt)) & (1 << 12)) ; - out_le16(&i2c->write_mailbox_ext, reg | (data << 8)); - out_le16(&i2c->write_mailbox, 0xc400 | (slave << 1)); + fpga_set_reg(screen, REG(i2c.write_mailbox_ext), reg | (data << 8)); + fpga_set_reg(screen, REG(i2c.write_mailbox), 0xc400 | (slave << 1)); }
static u8 fpga_iic_read(unsigned screen, u8 slave, u8 reg) { - struct ihs_fpga *fpga = (struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(screen); - struct ihs_i2c *i2c = &fpga->i2c; unsigned int ctr = 0;
- while (in_le16(&fpga->extended_interrupt) & (1 << 12)) + while (fpga_get_reg(screen, REG(extended_interrupt)) & (1 << 12)) ; - out_le16(&fpga->extended_interrupt, 1 << 14); - out_le16(&i2c->write_mailbox_ext, reg); - out_le16(&i2c->write_mailbox, 0xc000 | (slave << 1)); - while (!(in_le16(&fpga->extended_interrupt) & (1 << 14))) { + fpga_set_reg(screen, REG(extended_interrupt), 1 << 14); + fpga_set_reg(screen, REG(i2c.write_mailbox_ext), reg); + fpga_set_reg(screen, REG(i2c.write_mailbox), 0xc000 | (slave << 1)); + while (!(fpga_get_reg(screen, REG(extended_interrupt)) & (1 << 14))) { udelay(100000); if (ctr++ > 5) { printf("iic receive timeout\n"); break; } } - return in_le16(&i2c->read_mailbox_ext) >> 8; + return fpga_get_reg(screen, REG(i2c.read_mailbox_ext)) >> 8; } #endif
@@ -129,7 +126,6 @@ static void mpc92469ac_calc_parameters(unsigned int fout,
static void mpc92469ac_set(unsigned screen, unsigned int fout) { - struct ihs_fpga *fpga = (struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(screen); unsigned int n; unsigned int m; unsigned int bitval = 0; @@ -150,7 +146,7 @@ static void mpc92469ac_set(unsigned screen, unsigned int fout) break; }
- out_le16(&fpga->mpc3w_control, (bitval << 9) | m); + fpga_set_reg(screen, REG(mpc3w_control), (bitval << 9) | m); } #endif
@@ -265,14 +261,13 @@ static void ics8n3qv01_set(unsigned screen, unsigned int fout) static int osd_write_videomem(unsigned screen, unsigned offset, u16 *data, size_t charcount) { - struct ihs_fpga *fpga = - (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(screen); unsigned int k;
for (k = 0; k < charcount; ++k) { if (offset + k >= BUFSIZE) return -1; - out_le16(&fpga->videomem + offset + k, data[k]); + fpga_set_reg(screen, REG(videomem) + sizeof(u16) * (offset + k), + data[k]); }
return charcount; @@ -282,7 +277,7 @@ static int osd_print(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { unsigned screen;
- for (screen = 0; screen < CONFIG_SYS_OSD_SCREENS; ++screen) { + for (screen = 0; screen <= max_osd_screen; ++screen) { unsigned x; unsigned y; unsigned charcount; @@ -318,10 +313,8 @@ static int osd_print(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
int osd_probe(unsigned screen) { - struct ihs_fpga *fpga = (struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(screen); - struct ihs_osd *osd = &fpga->osd; - u16 version = in_le16(&osd->version); - u16 features = in_le16(&osd->features); + u16 version = fpga_get_reg(screen, REG(osd.version)); + u16 features = fpga_get_reg(screen, REG(osd.features)); unsigned width; unsigned height; u8 value; @@ -333,16 +326,16 @@ int osd_probe(unsigned screen) screen, version/100, version%100, width, height);
#ifdef CONFIG_SYS_CH7301 - value = i2c_reg_read(CH7301_I2C_ADDR, CH7301_DID); + value = bb_i2c_reg_read(screen, CH7301_I2C_ADDR, CH7301_DID); if (value != 0x17) { printf(" Probing CH7301 failed, DID %02x\n", value); return -1; } - i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPCP, 0x08); - i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPD, 0x16); - i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPF, 0x60); - i2c_reg_write(CH7301_I2C_ADDR, CH7301_DC, 0x09); - i2c_reg_write(CH7301_I2C_ADDR, CH7301_PM, 0xc0); + bb_i2c_reg_write(screen, CH7301_I2C_ADDR, CH7301_TPCP, 0x08); + bb_i2c_reg_write(screen, CH7301_I2C_ADDR, CH7301_TPD, 0x16); + bb_i2c_reg_write(screen, CH7301_I2C_ADDR, CH7301_TPF, 0x60); + bb_i2c_reg_write(screen, CH7301_I2C_ADDR, CH7301_DC, 0x09); + bb_i2c_reg_write(screen, CH7301_I2C_ADDR, CH7301_PM, 0xc0); #endif
#ifdef CONFIG_SYS_MPC92469AC @@ -372,12 +365,15 @@ int osd_probe(unsigned screen) fpga_iic_write(screen, SIL1178_MASTER_I2C_ADDRESS, 0x08, 0x37); #endif
- out_le16(&fpga->videocontrol, 0x0002); - out_le16(&osd->control, 0x0049); + fpga_set_reg(screen, REG(videocontrol), 0x0002); + fpga_set_reg(screen, REG(osd.control), 0x0049); + + fpga_set_reg(screen, REG(osd.xy_size), ((32 - 1) << 8) | (16 - 1)); + fpga_set_reg(screen, REG(osd.x_pos), 0x007f); + fpga_set_reg(screen, REG(osd.y_pos), 0x005f);
- out_le16(&osd->xy_size, ((32 - 1) << 8) | (16 - 1)); - out_le16(&osd->x_pos, 0x007f); - out_le16(&osd->y_pos, 0x005f); + if (screen > max_osd_screen) + max_osd_screen = screen;
return 0; } @@ -386,7 +382,7 @@ int osd_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { unsigned screen;
- for (screen = 0; screen < CONFIG_SYS_OSD_SCREENS; ++screen) { + for (screen = 0; screen <= max_osd_screen; ++screen) { unsigned x; unsigned y; unsigned k;