
Hi Gary,
On Thu, Mar 31, 2016 at 01:17:07PM +0200, Gary Bisson wrote:
Hi all,
Sorry to revive an old thread but I have some questions about thit patch.
On Fri, Oct 23, 2015 at 10:13:04AM +0800, Peng Fan wrote:
- add basic psci support for imx7 chip.
- support cpu_on and cpu_off.
- switch to non-secure mode when boot linux kernel.
- set csu allow accessing all peripherial register in non-secure mode.
Signed-off-by: Frank Li <Frank.Li at freescale.com> Signed-off-by: Peng Fan <Peng.Fan at freescale.com> Cc: Stefano Babic <sbabic at denx.de> Cc: Fabio Estevam <fabio.estevam at freescale.com>
[snip] diff --git a/arch/arm/include/asm/arch-mx7/imx-regs.h b/arch/arm/include/asm/arch-mx7/imx-regs.h index 4dc11ee..9213374 100644 --- a/arch/arm/include/asm/arch-mx7/imx-regs.h +++ b/arch/arm/include/asm/arch-mx7/imx-regs.h @@ -866,6 +866,9 @@ struct cspi_regs { ECSPI3_BASE_ADDR, \ ECSPI4_BASE_ADDR
+#define CSU_INIT_SEC_LEVEL0 0x00FF00FF +#define CSU_NUM_REGS 64
In the security documentation (revA) it is said that there are 40 CSL, why is it 64 here?
Also, although this seems to work, later on when the kernel boots I get the following CAAM errors: caam 30900000.caam: failed to acquire DECO 0 ... caam 30900000.caam: failed to acquire DECO 0 caam 30900000.caam: failed to instantiate RNG caam: probe of 30900000.caam failed with error -11
This patch will let SoC switch to non sec mode. I have little knowledge of CAAM, I guess it works in sec mode. So when kernel boots up, it will complains a lot...
If I revert this patch and therefore leave the CSU to its default state at bootup the above CAAM issue disappears, do you have any idea why?
Revert this patch, then all code runs in sec mode.
As a FYI, I am using U-Boot v2016.03 + a few patches that adds support for our i.MX7 Nitrogen7 board. You can find the repo here: https://github.com/boundarydevices/u-boot-imx6/tree/boundary-v2016.03
Also, if I base U-Boot on top of NXP repo it works too since this csu/psci support isn't there: http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/tree/?id=rel_imx_3.1...
Yeah. NXP code not switch to non sec mode.
You can revert this patch in your vendor tree. I am not sure whether you have tested linux upstream tree, or you use caam code from NXP vendor tree. If you use NXP vendor tree, and use uboot upstream code, sure caam will complain errros. We would like to use PSCI and work in non-sec mode, but still some works need to be done.
Regards, Peng.
Regards, Gary _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot