[U-Boot] [PATCH V2 1/3] i.MX6: define CACHELINE_SIZE

Signed-off-by: Eric Nelson eric.nelson@boundarydevices.com Acked-by: Marek Vasut marex@denx.de

--- arch/arm/include/asm/arch-mx6/imx-regs.h | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 6a200bb..3e5c4c2 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -19,6 +19,8 @@ #ifndef __ASM_ARCH_MX6_IMX_REGS_H__ #define __ASM_ARCH_MX6_IMX_REGS_H__

+#define CONFIG_SYS_CACHELINE_SIZE 32 + #define ROMCP_ARB_BASE_ADDR 0x00000000 #define ROMCP_ARB_END_ADDR 0x000FFFFF #define CAAM_ARB_BASE_ADDR 0x00100000