Dear Vivek Gautam,
XHCI stack driver needs this to align buffers to CacheLine boundary. So define the same to be '64'
Signed-off-by: Vivek Gautam gautam.vivek@samsung.com Cc: Julius Werner jwerner@chromium.org Cc: Simon Glass sjg@chromium.org Cc: Minkyu Kang mk7.kang@samsung.com Cc: Dan Murphy dmurphy@ti.com Cc: Marek Vasut marex@denx.de
include/configs/exynos5250-dt.h | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h index 8f8f85f..86d57e3 100644 --- a/include/configs/exynos5250-dt.h +++ b/include/configs/exynos5250-dt.h @@ -37,6 +37,8 @@ /* Keep L2 Cache Disabled */ #define CONFIG_SYS_DCACHE_OFF
+#define CONFIG_SYS_CACHELINE_SIZE 64
/* Enable ACE acceleration for SHA1 and SHA256 */ #define CONFIG_EXYNOS_ACE_SHA #define CONFIG_SHA_HW_ACCEL
Albert, care to apply this one separatelly?
Best regards, Marek Vasut