On Sonntag, 3. September 2017 17:26:43 CEST Heinrich Schuchardt wrote:
On 09/03/2017 02:19 PM, Alexander Graf wrote:
On 03.09.17 08:17, Heinrich Schuchardt wrote:
The target $(obj)/helloworld.so: exists twice in Makefile.lib.
If you add an echo command to each of the two recipes you get warnings like:
scripts/Makefile.lib:383: warning: overriding recipe for target 'drivers/power/battery/helloworld.so' scripts/Makefile.lib:379: warning: ignoring old recipe for target 'drivers/power/battery/helloworld.so'
This patch removes the obsolete target.
Signed-off-by: Heinrich Schuchardt xypron.glpk@gmx.de
Hello Alex,
could you, please, review the change as it relates to EFI.
My Makefile foo isn't quite as good as it should be, but doesn't the existing code simply add another dependency to the required build chain?
The target is overridden so why should the dependency be executed?
https://www.gnu.org/software/make/manual/html_node/Overriding-Makefiles.html says: "However, it is invalid for two makefiles to give different recipes for the same target. I guess this will be valid for a single makefile too."
If you think the dependency is necessary, I can add it to the remaining target. Is this what you prefer?
Note there is a difference between prerequisite and recipe - specifying a target multiple times without recipe adds the the prerequisite to the existing set, see
https://www.gnu.org/software/make/manual/html_node/Multiple-Targets.html#Mul...
--- foo: a
foo: b c
a: @echo "Creating prereq a"
%: @echo "Creating $@" ----
This tries to create the default target foo (first specified target), which has three prerequisites (a, b, c), which are run in parallel.
Kind regards,
Stefan