Hi Fabio,
Hi Lukasz,
On Wed, Aug 10, 2016 at 5:15 AM, Lukasz Majewski l.majewski@majess.pl wrote:
I see that I wasn't the only one.
Both patches are identical, Stefan was first :-)
My concern is that, as I've written with comment to my patch, that when I was running build tests some other boards were broken since they didn't define CONFIG_SYS_CACHELINE_SIZE.
For which boards did you see build failure with this patch?
Branch: master SHA1: f60d0603edca472c4458b30956f38c6c1a836d66
Siemens: axm board
./tools/buildman/buildman.py --branch=HEAD siemens --detail --verbose --show_errors --force-build --count=1 --output-dir=./BUILD/
04: ARM: cache: cp15: Align addresses when initial page_table setup is flushed arm: + axm +../arch/arm/lib/cache-cp15.c: In function 'mmu_set_region_dcache_behaviour': +../arch/arm/lib/cache-cp15.c:76:7: error: 'CONFIG_SYS_CACHELINE_SIZE' undeclared (first use in this function) + & ~(CONFIG_SYS_CACHELINE_SIZE - 1);
Samsung: smdk2410
01: ARM: cache: cp15: Align addresses when initial page_table setup is flushed arm: + smdk2410 +../arch/arm/lib/cache-cp15.c: In function 'mmu_set_region_dcache_behaviour': +../arch/arm/lib/cache-cp15.c:76:7: error: 'CONFIG_SYS_CACHELINE_SIZE' undeclared (first use in this function) + & ~(CONFIG_SYS_CACHELINE_SIZE - 1);
Probably more boards is affected too.
Thanks
Best regards, Łukasz Majewski