Hi,
On 09-11-16 11:21, Chen-Yu Tsai wrote:
The A80 also has the TrustZone Protection Controller (TZPC), called the Secure Memory Touch Arbiter (SMTA).
Enable non-secure access to all the peripherals at boot time.
Signed-off-by: Chen-Yu Tsai wens@csie.org
LGTM:
Reviewed-by: Hans de Goede hdegoede@redhat.com
Regards,
Hans
arch/arm/cpu/armv7/sunxi/Makefile | 1 + arch/arm/cpu/armv7/sunxi/tzpc.c | 6 ++++++ arch/arm/include/asm/arch-sunxi/cpu_sun9i.h | 1 + arch/arm/include/asm/arch-sunxi/tzpc.h | 4 ++++ arch/arm/mach-sunxi/board.c | 3 ++- 5 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile index b35b9df4a9d6..239c659ec032 100644 --- a/arch/arm/cpu/armv7/sunxi/Makefile +++ b/arch/arm/cpu/armv7/sunxi/Makefile @@ -11,6 +11,7 @@ obj-y += timer.o
obj-$(CONFIG_MACH_SUN6I) += tzpc.o obj-$(CONFIG_MACH_SUN8I_H3) += tzpc.o +obj-$(CONFIG_MACH_SUN9I) += tzpc.o
ifndef CONFIG_SPL_BUILD obj-$(CONFIG_ARMV7_PSCI) += psci.o diff --git a/arch/arm/cpu/armv7/sunxi/tzpc.c b/arch/arm/cpu/armv7/sunxi/tzpc.c index 6c8a0fd9a25b..2a2cf363b99c 100644 --- a/arch/arm/cpu/armv7/sunxi/tzpc.c +++ b/arch/arm/cpu/armv7/sunxi/tzpc.c @@ -24,4 +24,10 @@ void tzpc_init(void) writel(SUN8I_H3_TZPC_DECPORT1_ALL, &tzpc->decport1_set); writel(SUN8I_H3_TZPC_DECPORT2_ALL, &tzpc->decport2_set); #endif
+#ifdef CONFIG_MACH_SUN9I
- writel(SUN9I_TZPC_DECPORT0_ALL, &tzpc->decport0_set);
- writel(SUN9I_TZPC_DECPORT1_ALL, &tzpc->decport1_set);
- writel(SUN9I_TZPC_DECPORT2_ALL, &tzpc->decport2_set);
+#endif } diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h index e9839eecaa92..25114174f395 100644 --- a/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h @@ -90,6 +90,7 @@ #define SUNXI_TIMER_BASE (REGS_APB0_BASE + 0x0C00) #define SUNXI_PWM_BASE (REGS_APB0_BASE + 0x1400) #define SUNXI_LRADC_BASE (REGS_APB0_BASE + 0x1800) +#define SUNXI_TZPC_BASE (REGS_APB0_BASE + 0x3400)
/* APB1 Module */ #define SUNXI_UART0_BASE (REGS_APB1_BASE + 0x0000) diff --git a/arch/arm/include/asm/arch-sunxi/tzpc.h b/arch/arm/include/asm/arch-sunxi/tzpc.h index 95c55cd4d130..3425d00edd97 100644 --- a/arch/arm/include/asm/arch-sunxi/tzpc.h +++ b/arch/arm/include/asm/arch-sunxi/tzpc.h @@ -29,6 +29,10 @@ struct sunxi_tzpc { #define SUN8I_H3_TZPC_DECPORT1_ALL 0xff #define SUN8I_H3_TZPC_DECPORT2_ALL 0x7f
+#define SUN9I_TZPC_DECPORT0_ALL 0xfe +#define SUN9I_TZPC_DECPORT1_ALL 0x7f +#define SUN9I_TZPC_DECPORT2_ALL 0x00
void tzpc_init(void);
#endif /* _SUNXI_TZPC_H */ diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index 0f8ead980cdc..0053f562e00d 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -190,7 +190,8 @@ void s_init(void) "orr r0, r0, #1 << 6\n" "mcr p15, 0, r0, c1, c0, 1\n"); #endif -#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3 +#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3 || \
- defined CONFIG_MACH_SUN9I /* Enable non-secure access to some peripherals */ tzpc_init();
#endif