Hi,
I am trying to map a PCIe peripherical on my MPC8536 custom board. I already have u-boot and linux kernel running fine on this board.
The peripherical is on PCIe1 port. Compiling u-boot using debug flag I have the following log:
pci_init_board: devdisr=40900, sdrs2_io_sel=7, io_sel=7 Serdes2 disalbed
PCIE3: disabled
PCIE1: disabled
PCIE2: disabled
PCI: 32 bit, 66 MHz, sync, host, arbiter (base address ffe08000) with errors. Clearing. Now 0x0b200091Outbound memory range: f0000000:100000000 PCICSRBAR @ 0xeff00000 R0 bus_start: 0 phys_start: 0 size: 8000000 R64 bus_start: 1000000000 phys_start: 0 size: 8000000 PCI reg:0 0000000c00000000:00000000f0000000 0000000010000000 00000000 PCI reg:1 0000000fffc00000:0000000000000000 0000000000010000 00000001 PCI reg:2 0000000fffe00000:00000000eff00000 0000000000100000 00000100 PCI reg:3 0000000000000000:0000000000000000 0000000008000000 00000108 PCI reg:4 0000000000000000:0000001000000000 0000000008000000 00000108 Scanning PCI bus 00 PCIE1 on bus 00 - 00
Running pci command I can see:
=> pci Scanning PCI devices on bus 0 BusDevFun VendorId DeviceId Device Class Sub-Class _____________________________________________________________ 00.00.00 0x1957 0x0050 Processor 0x20
I don't know if I am correct, but I understand that the PCIe controller identify itself. However, the PCIe peripherical was not found.
Bellow, the default PCIe1 configuration to MPC8536DS target. Could something in this configuration prevent the PCIe peripherical to be found?
I have CONFIG_PHYS_64BIT enabled.
/* controller 1, Slot 1, tgtid 1, Base address a000 */ #define CONFIG_SYS_PCIE1_MEM_VIRT 0x90000000 #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_PCIE1_MEM_BUS 0xf8000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc10000000ull #else #define CONFIG_SYS_PCIE1_MEM_BUS 0x90000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0x90000000 #endif #define CONFIG_SYS_PCIE1_MEM_SIZE 0x08000000 /* 128M */ #define CONFIG_SYS_PCIE1_IO_VIRT 0xffc10000 #define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_PCIE1_IO_PHYS 0xfffc10000ull #else #define CONFIG_SYS_PCIE1_IO_PHYS 0xffc10000 #endif #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */
Thank you.
Carlos R. Moratelli