
19 Apr
2018
19 Apr
'18
10:19 a.m.
On 04/19/2018 07:15 AM, See, Chin Liang wrote:
On Thu, 2018-04-19 at 04:47 +0200, Marek Vasut wrote:
On 04/19/2018 11:50 AM, Ley Foon Tan wrote:
Add CONFIG_SYS_L2_PL310 conditional build.
Why ?
In ARM64, L2 cache controller is accessed through processor registers. Hence we shall make this conditional in order this file can be shared across SOCFPGAs.
That should be in the patch description . Do you ever add the PL310 register access on S10 later in the set?
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Best regards,
Marek Vasut