On 20.04.2015 11:24, Pavel Machek wrote:
Which SPI flash are you talking about -- QSPI one or EPCS/EPCQ one ?
I think Stefan got the QSPI one working. EPCQ is a bit trickier.
Datasheet mentions QSPI_IO*/CLK/SS* pins, so I assume it is QSPI.
Yes, QSPI handles the SPI NOR flash chips on SoCFPGA.
On 20.04.2015 10:36, Pavel Machek wrote:
I see that u-boot 2015.04 has SPI flash configured in the socfpga_cyclone5_socrates.dts. But as far as I know, socdk should have same SPI flash, right? Should similar dts part be enabled there, too?
SPI NOR flash is working for me on SoCrates and another similar custom SOCFPGA based board just fine.
Thanks, that's useful to know.
I tried to get the support to work on custom board, but was not successful so far. Does it work for you, or are still some parts missing?
Not that I know of. What are the problems that you experience?
For tests, I've used config similar to socrates, even through the board should be more similar to socdk:
U-Boot 2015.04-rc4-00103-gef7e76c-dirty (Apr 20 2015 - 10:24:33)
CPU: Altera SoCFPGA Platform Watchdog enabled I2C: ready DRAM: 256 MiB MMC: SOCFPGA DWMMC: 0 Using default environment
In: serial Out: serial Err: serial Model: EBV SOCrates Net: dwmac.ff702000 Hit any key to stop autoboot: 0 => sf probe Invalid chip select 0:0 (err=-19) SF: Failed to set up slave Failed to initialize SPI flash at 0:0 =>
IIRC, then the aliases in the dts are very important for this:
aliases { spi0 = "/spi@ff705000"; /* QSPI */ ...
Did you add those to your dts as well?
One thing that puzzles me:
./arch/arm/dts/socfpga_cyclone5_socrates.dts: flash0: n25q00@0 { ./arch/arm/dts/socfpga_cyclone5_socrates.dts: compatible = "n25q00";
..but I see no mention of that compatible string anywhere else. 2013-altera u-boot used ./drivers/mtd/spi/stmicro.c to handle it...
IIRC, the flash detection is done via autodetection by reading the parameters from the chip itself.
Thanks, Stefan