Hi york,
Is it for DDR4? LS1021A doesn't use this file.
Best Regards, Yuan Yao
-----Original Message----- From: York Sun [mailto:yorksun@freescale.com] Sent: Friday, November 06, 2015 2:05 AM To: Yuan Yao-B46683 yao.yuan@freescale.com Cc: Wang Huan-B18965 alison.wang@freescale.com; u-boot@lists.denx.de Subject: Re: [PATCH v2 4/5] armv7/fsl-ls102xa: Workaround for DDR erratum A008514
On 11/05/2015 02:26 AM, Yuan Yao wrote:
This is a workaround for hardware erratum. Write the value of 63b2_0002h to EDDRTQCFG will optimal the memory controller performance.
The value: 63b2_0002h comes from the hardware team.
Signed-off-by: Yuan Yao yao.yuan@freescale.com
Changes in v2: Rewrite the commit message to explain why and what this patch does.
arch/arm/cpu/armv7/ls102xa/soc.c | 10 ++++++++++ arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 +- 2 files changed, 11 insertions(+), 1 deletion(-)
Workaround for A008514 is already implemented in DDR driver drivers/ddr/fsl/fsl_ddr_gen4.c. Please see if you can merge your workaround into it.
York