From: Tien Fong Chee tien.fong.chee@intel.com
Adding configuration for SPL malloc pool.
Signed-off-by: Tien Fong Chee tien.fong.chee@intel.com --- configs/socfpga_agilex5_defconfig | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/configs/socfpga_agilex5_defconfig b/configs/socfpga_agilex5_defconfig index dc1cef3754e..81bbe967dcf 100644 --- a/configs/socfpga_agilex5_defconfig +++ b/configs/socfpga_agilex5_defconfig @@ -29,6 +29,10 @@ CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 initrd=0x90000000 root=/dev/ram0 rw init=/sbin/init ramdisk_size=10000000 earlycon panic=-1 nosmp kvm-arm.mode=nvhe" CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_SYS_MALLOC=y +CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y +CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0xbfa00000 +CONFIG_SPL_SYS_MALLOC_SIZE=0x500000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_CACHE=y