For LS1043, SEC read/writes are made snoopable by setting the corresponding bits in SCFG to avoid coherency issues.
Signed-off-by: Aneesh Bansal aneesh.bansal@freescale.com --- Changes in v2: New Patch Set created with an additional patch Commit Subject modified
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 637853d..e7b188d 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -81,11 +81,16 @@ void fsl_lsch3_early_init_f(void) void fsl_lsch2_early_init_f(void) { struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR; + struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
#ifdef CONFIG_FSL_IFC init_early_memctl_regs(); /* tighten IFC timing */ #endif
+ /* Make SEC reads and writes snoopable */ + setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SECRDSNP | + SCFG_SNPCNFGCR_SECWRSNP); + /* * Enable snoop requests and DVM message requests for * Slave insterface S4 (A53 core cluster)