This patch modify Makefile and Kconfig file in order to build Broadwell-de platforms.
Signed-off-by: Vincenzo Bove vnktux@protonmail.com
--- arch/x86/Kconfig | 5 +++++ arch/x86/cpu/Makefile | 1 + include/fdtdec.h | 1 + lib/fdtdec.c | 1 + tools/binman/etype/intel_spd.py | 14 ++++++++++++++ 5 files changed, 22 insertions(+) create mode 100644 tools/binman/etype/intel_spd.py
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 9d78c80d9f..57fdcd780b 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -78,6 +78,9 @@ config VENDOR_GOOGLE config VENDOR_INTEL bool "Intel"
+config VENDOR_PRODRIVE + bool "Prodrive" + endchoice
# subarchitectures-specific options below @@ -105,11 +108,13 @@ source "board/efi/Kconfig" source "board/emulation/Kconfig" source "board/google/Kconfig" source "board/intel/Kconfig" +source "board/prodrive/Kconfig"
# platform-specific options below source "arch/x86/cpu/baytrail/Kconfig" source "arch/x86/cpu/braswell/Kconfig" source "arch/x86/cpu/broadwell/Kconfig" +source "arch/x86/cpu/broadwell-de/Kconfig" source "arch/x86/cpu/coreboot/Kconfig" source "arch/x86/cpu/ivybridge/Kconfig" source "arch/x86/cpu/qemu/Kconfig" diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile index 94cdff18cc..1fb1c40095 100644 --- a/arch/x86/cpu/Makefile +++ b/arch/x86/cpu/Makefile @@ -29,6 +29,7 @@ obj-y += intel_common/ obj-$(CONFIG_INTEL_BAYTRAIL) += baytrail/ obj-$(CONFIG_INTEL_BRASWELL) += braswell/ obj-$(CONFIG_INTEL_BROADWELL) += broadwell/ +obj-$(CONFIG_INTEL_BROADWELL_DE) += broadwell-de/ obj-$(CONFIG_SYS_COREBOOT) += coreboot/ obj-$(CONFIG_EFI_APP) += efi/ obj-$(CONFIG_QEMU) += qemu/ diff --git a/include/fdtdec.h b/include/fdtdec.h index 4afb9ac501..ea8bff43a1 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -150,6 +150,7 @@ enum fdt_compat_id { COMPAT_INTEL_BAYTRAIL_FSP, /* Intel Bay Trail FSP */ COMPAT_INTEL_BAYTRAIL_FSP_MDP, /* Intel FSP memory-down params */ COMPAT_INTEL_IVYBRIDGE_FSP, /* Intel Ivy Bridge FSP */ + COMPAT_INTEL_BROADWELL_DE_FSP, /* Intel Broadwell-DE FSP */ COMPAT_SUNXI_NAND, /* SUNXI NAND controller */ COMPAT_ALTERA_SOCFPGA_CLK, /* SoCFPGA Clock initialization */ COMPAT_ALTERA_SOCFPGA_PINCTRL_SINGLE, /* SoCFPGA pinctrl-single */ diff --git a/lib/fdtdec.c b/lib/fdtdec.c index df9d9ae433..e1a2f176e3 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -62,6 +62,7 @@ static const char * const compat_names[COMPAT_COUNT] = { COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"), COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"), COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"), + COMPAT(INTEL_BROADWELL_DE_FSP, "intel,broadwell-de-fsp"), COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"), COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"), COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"), diff --git a/tools/binman/etype/intel_spd.py b/tools/binman/etype/intel_spd.py new file mode 100644 index 0000000000..028c98f0c8 --- /dev/null +++ b/tools/binman/etype/intel_spd.py @@ -0,0 +1,14 @@ +# Copyright (c) 2016 Google, Inc +# Written by Simon Glass sjg@chromium.org +# +# SPDX-License-Identifier: GPL-2.0+ +# +# Entry-type module for Intel Management Engine binary blob +# + +from entry import Entry +from blob import Entry_blob + +class Entry_intel_spd(Entry_blob): + def __init__(self, image, etype, node): + Entry_blob.__init__(self, image, etype, node) \ No newline at end of file -- 2.11.0