-----Original Message----- From: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com Sent: Monday, April 6, 2020 8:49 PM To: Tan, Ley Foon ley.foon.tan@intel.com; u-boot@lists.denx.de Cc: Marek Vasut marex@denx.de; Ley Foon Tan lftan.linux@gmail.com; See, Chin Liang chin.liang.see@intel.com; Chee, Tien Fong tien.fong.chee@intel.com Subject: Re: [PATCH 3/3] arm: socfpga: arria10: Enable cache driver in SPL
Am 06.04.2020 um 11:18 schrieb Ley Foon Tan:
Adding "u-boot,dm-pre-reloc" and enable CONFIG_SPL_CACHE to enable cache driver in SPL.
This fixed error below in SPL: cache controller driver NOT found!
Signed-off-by: Ley Foon Tan ley.foon.tan@intel.com
arch/arm/dts/socfpga_arria10-u-boot.dtsi | 4 ++++ configs/socfpga_arria10_defconfig | 1 + 2 files changed, 5 insertions(+)
diff --git a/arch/arm/dts/socfpga_arria10-u-boot.dtsi b/arch/arm/dts/socfpga_arria10-u-boot.dtsi index 0db358cf1f2b..6ff1ea6e5eb7 100644 --- a/arch/arm/dts/socfpga_arria10-u-boot.dtsi +++ b/arch/arm/dts/socfpga_arria10-u-boot.dtsi @@ -73,6 +73,10 @@ reset-names = "i2c"; };
+&L2 {
- u-boot,dm-pre-reloc;
+};
&l4_mp_clk { u-boot,dm-pre-reloc; }; diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index ca34457ddd16..875031a77e3a 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -22,6 +22,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_FPGA_SUPPORT=y +CONFIG_SPL_CACHE=y
Can you select or default this in Kconfig if it's required for all Arria10 boards (even if we only have one right now)?
Okay.
Thanks.
Regards Ley Foon