-----Original Message----- From: laurentiu.tudor@nxp.com [mailto:laurentiu.tudor@nxp.com] Sent: Tuesday, July 31, 2018 8:22 PM To: u-boot@lists.denx.de; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; York Sun york.sun@nxp.com Cc: Bharat Bhushan bharat.bhushan@nxp.com; Horia Geanta horia.geanta@nxp.com; Laurentiu Tudor laurentiu.tudor@nxp.com Subject: [PATCH v6 1/8] armv8: fsl-layerscape: add missing register blocks base address defines
From: Laurentiu Tudor laurentiu.tudor@nxp.com
Add defines for the edma and qdma register block base addresses.
Signed-off-by: Laurentiu Tudor laurentiu.tudor@nxp.com
Reviewed-by: Bharat Bhushan bharat.bhushan@nxp.com
Thanks -Bharat
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index 5b4767e0fe..644a16dd30 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -88,8 +88,12 @@
#define LPUART_BASE (CONFIG_SYS_IMMR + 0x01950000)
+#define EDMA_BASE_ADDR (CONFIG_SYS_IMMR
- 0x01c00000)
#define AHCI_BASE_ADDR (CONFIG_SYS_IMMR
- 0x02200000)
+#define QDMA_BASE_ADDR (CONFIG_SYS_IMMR
- 0x07380000)
#define CONFIG_SYS_PCIE1_PHYS_ADDR 0x4000000000ULL #define CONFIG_SYS_PCIE2_PHYS_ADDR 0x4800000000ULL
#define CONFIG_SYS_PCIE3_PHYS_ADDR 0x5000000000ULL
2.17.1