The following series takes care of two problems: a) A potential race when R5 (boot processor) is parsing and loading DM firmware elf sections way slower than A53 executing. b) We load the FIT image to the same address as the elf sections. See [1] as example.
NOTE: Though, in theory, the Device Manager's linker file could be constructed such as to avoid the overlap address, there is no guarentee of implicit assumptions and the fact that DM's firmware can be combined with additional functionality could result in unexpected behavior as well.
To prevent this, lets just have explicit load address and sequencing.
Nishanth Menon (2): arm: mach-k3: common: Make sure firmware sections are loaded prior to armv8 startup tools: k3_fit_atf: Change DM load address to avoid conflict
arch/arm/mach-k3/common.c | 30 ++++++++++++++++++------------ tools/k3_fit_atf.sh | 4 ++-- 2 files changed, 20 insertions(+), 14 deletions(-)
[1] $ arm-none-linux-gnueabihf-readelf -S ti-dm/j721e/ipc_echo_testb_mcu1_0_release_strip.xer5f There are 39 section headers, starting at offset 0x2aa98:
Section Headers: [Nr] Name Type Addr Off Size ES Flg Lk Inf Al [ 0] NULL 00000000 000000 000000 00 0 0 0 [ 1] .freertosrst[...] PROGBITS 41010000 000038 000040 00 AX 0 0 8 [ 2] .bootCode PROGBITS 41010a60 000a98 000118 00 AX 0 0 8 [ 3] .startupCode PROGBITS 41010410 000448 000338 00 AX 0 0 8 [ 4] .startupData PROGBITS 41010748 000780 000318 00 A 0 0 8 [ 5] .text.hwi PROGBITS 41010040 000078 0003d0 00 AX 0 0 8 [ 6] .text.cache NOBITS 41010410 02a680 000000 00 AX 0 0 8 [ 7] .text.mpu NOBITS 41010410 02a680 000000 00 AX 0 0 8 [ 8] .text.boot NOBITS 41010410 02a680 000000 00 AX 0 0 8 [ 9] .text PROGBITS a05b8fb0 002000 016340 00 AX 0 0 8 [10] .const PROGBITS a05cf2f0 018340 00c470 00 A 0 0 8 [11] .cinit PROGBITS a0581400 001100 000818 00 A 0 0 8 [12] .bss NOBITS a0582000 002000 036faa 00 WA 0 0 8192 [13] .far NOBITS 00000000 000000 000000 00 0 0 4 [14] .data NOBITS a05db780 024800 008100 00 WA 0 0 128 [15] .sysmem NOBITS 00000000 000000 000000 00 0 0 1 [16] .data_buffer NOBITS 00000000 02a680 000000 00 WA 0 0 128 [17] .bss.devgroup* NOBITS a05e9700 02a680 0011f8 00 WA 0 0 4 [18] .const.devgroup* PROGBITS a05e3880 024800 004710 00 A 0 0 4 [19] .boardcfg_data PROGBITS a05e8000 028f80 001700 00 A 0 0 128 [20] .benchmark_buffer NOBITS 00000000 000000 000000 00 0 0 8 [21] ipc_data_buffer NOBITS a0400000 001100 181400 00 WA 0 0 128 [22] .resource_table PROGBITS a0180000 001000 00008c 00 A 0 0 4096 [23] .tracebuf NOBITS a0100000 000c00 080000 00 WA 0 0 1024 [24] .stack NOBITS a0ffc000 02a680 004000 00 WA 0 0 8 [25] .irqStack NOBITS a0ffae00 02a880 001000 00 A 0 0 4 [26] .fiqStack NOBITS a0ffbe00 02b880 000100 00 A 0 0 4 [27] .abortStack NOBITS a0ffbf00 02b980 000100 00 A 0 0 4 [28] .undStack NOBITS a0ffac00 02a680 000100 00 A 0 0 4 [29] .svcStack NOBITS a0ffad00 02a780 000100 00 A 0 0 4 [30] .TI.noinit NOBITS 00000000 000000 000000 00 0 0 4 [31] .TI.persistent NOBITS 00000000 000000 000000 00 0 0 128 [32] __llvm_prf_cnts NOBITS a0400000 02a680 000000 00 A 0 0 4 [33] Veneer$$CMSE NOBITS 00000000 000000 000000 00 0 0 1 [34] .ARM.attributes ARM_ATTRIBUTES 00000000 02a680 00005b 00 0 0 0 [35] .symtab SYMTAB 00000000 02a6dc 000030 10 37 1 0 [36] .TI.section.flags PROGBITS 00000000 02a70c 000020 00 0 0 0 [37] .strtab STRTAB 00000000 02a72c 000014 01 S 0 0 0 [38] .shstrtab STRTAB 00000000 02a740 0001b6 01 S 0 0 0