
4 Nov
2013
4 Nov
'13
11:32 a.m.
Hello Andreas,
Am 04.11.2013 11:15, schrieb Andreas Bießmann:
Hello Heiko,
On 11/04/2013 10:53 AM, Heiko Schocher wrote:
Am 04.11.2013 09:53, schrieb Andreas Bießmann:
On 11/04/2013 07:40 AM, Heiko Schocher wrote:
<snip>
- erstl = readl(&rstc->mr)& AT91_RSTC_MR_ERSTL_MASK;
- /* Need to reset PHY -> 500ms reset */
- writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
AT91_RSTC_MR_URSTEN,&rstc->mr);
- writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST,&rstc->cr);
- /* Wait for end of reset */
- at91_wait_for_reset(100);
You say above, that this will be 500ms reset pulse ... but wait just 100ms. Is that Ok? Please also check the taurus board.
We should rework this as Wolfgang suggested, or?
Could you please give me a pointer? I can't remember what Wolfgang suggested here.
See Wolfgangs comment to my "arm, at91: add function for waiting if reset ends" patch:
http://lists.denx.de/pipermail/u-boot/2013-November/166061.html
bye, Heiko
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