Hi Eugen, I will fix the subject as required. Just wanted to tell that I didn’t test the gpio commands in uboot. The part that interested me was the pinctl and that it is unable to set the correct peripheral function from DTS. The function that interested me was Ethernet. I will also check the gpio functionality than I am back to office on Sunday.
Thanks! Alexey.
On 18 Oct 2024, at 10:15, Eugen Hristev eugen.hristev@linaro.org wrote:
Hello Alexey,
Please fix the subject to adhere to the rules ARM: dts: .... etc, if you are unsure, please follow previous commits that touched this file.
On 10/17/24 11:51, Manikandan.M@microchip.com wrote: Hi Alexey,
On 15/10/24 8:23 pm, Alexey Tsirlin wrote: This allows setting the GPIO parameters from device tree, otherwise the at91_pin_check_config will fail because the priv->nbanks equal to zero
I remember these pin banks are outside of the pinctrl because the driver fails to probe them if they are inside. Is this no longer true ?
Manikandan, is it possible to test this on the board? and use the gpio command in U-boot to toggle the pins , like e.g. for the LEDs and see if there is no regression ?
Thanks, Eugen
Signed-off-by: Alexey Tsirlin alexey@all4bambi.com
arch/arm/dts/sama5d3.dtsi | 111 +++++++++++++++++++------------------- 1 file changed, 56 insertions(+), 55 deletions(-)
diff --git a/arch/arm/dts/sama5d3.dtsi b/arch/arm/dts/sama5d3.dtsi index 4c03a302ec..c671ea42f2 100644 --- a/arch/arm/dts/sama5d3.dtsi +++ b/arch/arm/dts/sama5d3.dtsi @@ -873,66 +873,67 @@ AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */ }; };
};
pioA: gpio@fffff200 {compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";reg = <0xfffff200 0x100>;interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;#gpio-cells = <2>;gpio-controller;interrupt-controller;har#interrupt-cells = <2>;clocks = <&pioA_clk>;bootph-all;};
pioA: gpio@fffff200 {compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";Spaces instead of tab before 'compatible', should be consistent with the remaining properties of pioA node.
reg = <0xfffff200 0x100>;interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;#gpio-cells = <2>;gpio-controller;interrupt-controller;#interrupt-cells = <2>;clocks = <&pioA_clk>;bootph-all;};
pioB: gpio@fffff400 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";reg = <0xfffff400 0x100>;interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;#gpio-cells = <2>;gpio-controller;interrupt-controller;#interrupt-cells = <2>;clocks = <&pioB_clk>;bootph-all;};
pioB: gpio@fffff400 {compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";Ditto
reg = <0xfffff400 0x100>;interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;#gpio-cells = <2>;gpio-controller;interrupt-controller;#interrupt-cells = <2>;clocks = <&pioB_clk>;bootph-all;};
pioC: gpio@fffff600 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";reg = <0xfffff600 0x100>;interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;#gpio-cells = <2>;gpio-controller;interrupt-controller;#interrupt-cells = <2>;clocks = <&pioC_clk>;bootph-all;};
pioC: gpio@fffff600 {compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";Ditto
reg = <0xfffff600 0x100>;interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;#gpio-cells = <2>;gpio-controller;interrupt-controller;#interrupt-cells = <2>;clocks = <&pioC_clk>;bootph-all;};
pioD: gpio@fffff800 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";reg = <0xfffff800 0x100>;interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;#gpio-cells = <2>;gpio-controller;interrupt-controller;#interrupt-cells = <2>;clocks = <&pioD_clk>;bootph-all;};
pioD: gpio@fffff800 {compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";Ditto
reg = <0xfffff800 0x100>;interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;#gpio-cells = <2>;gpio-controller;interrupt-controller;#interrupt-cells = <2>;clocks = <&pioD_clk>;bootph-all;};pioE: gpio@fffffa00 {compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";Ditto
reg = <0xfffffa00 0x100>;interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;#gpio-cells = <2>;gpio-controller;interrupt-controller;#interrupt-cells = <2>;clocks = <&pioE_clk>;bootph-all;};Extra line
pioE: gpio@fffffa00 {compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";reg = <0xfffffa00 0x100>;interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;#gpio-cells = <2>;gpio-controller;interrupt-controller;#interrupt-cells = <2>;clocks = <&pioE_clk>;bootph-all; }; pmc: pmc@fffffc00 {